Resistor-capacitor oscillation circuit capable of adjusting oscillation frequency and method of the same
    1.
    发明授权
    Resistor-capacitor oscillation circuit capable of adjusting oscillation frequency and method of the same 失效
    电阻电容振荡电路能够调节振荡频率及其方法

    公开(公告)号:US07612624B2

    公开(公告)日:2009-11-03

    申请号:US11928720

    申请日:2007-10-30

    IPC分类号: H03K3/02

    CPC分类号: H03K3/011 H03L7/06

    摘要: An RC oscillation circuit and method capable of adjusting an oscillation frequency includes: an RC oscillator including a variable resistor and a variable capacitor, the RC oscillator generating an RC oscillating signal having a frequency determined by a resistance of the variable resistor and a capacitance of the variable capacitor; a counter counting a clock number of a reference oscillating signal corresponding to one period of the RC oscillating signal to generate a first count value, the reference oscillating signal having a preset frequency; and a frequency controller controlling a frequency of the RC oscillating signal by determining the resistance of the variable resistor and the capacitance of the variable capacitor such that a difference between the first count value and a preset second count value is smaller than a preset first critical value.

    摘要翻译: 一种能够调节振荡频率的RC振荡电路和方法包括:RC振荡器,包括可变电阻器和可变电容器,RC振荡器产生具有由可变电阻器的电阻确定的频率的RC振荡信号和 可变电容器 计数对应于RC振荡信号的一个周期的参考振荡信号的时钟数,以产生第一计数值,所述参考振荡信号具有预置频率; 以及频率控制器,通过确定可变电阻器的电阻和可变电容器的电容来控制RC振荡信号的频率,使得第一计数值和预设的第二计数值之间的差小于预设的第一临界值 。

    APPARATUS AND METHOD FOR CONTROLLING LIGHTING BRIGHTNESS THROUGH DIGITAL CONVERSION
    2.
    发明申请
    APPARATUS AND METHOD FOR CONTROLLING LIGHTING BRIGHTNESS THROUGH DIGITAL CONVERSION 有权
    通过数字转换控制照明亮度的装置和方法

    公开(公告)号:US20090160362A1

    公开(公告)日:2009-06-25

    申请号:US12108778

    申请日:2008-04-24

    IPC分类号: H05B37/02

    CPC分类号: H05B33/086

    摘要: Provided is an apparatus for controlling lighting brightness including a light control unit that generates a control signal for controlling the brightness of a plurality of lightings; a digital signal generating unit that converts a signal corresponding to the control signal at each period so as to generate non-periodic digital signals; and a driving voltage generating unit that generate driving voltages by converting the digital signals into analog signals.

    摘要翻译: 提供一种用于控制照明亮度的装置,包括产生用于控制多个照明亮度的控制信号的光控制单元; 数字信号发生单元,其在每个周期转换对应于控制信号的信号,以便产生非周期数字信号; 以及通过将数字信号转换为模拟信号来产生驱动电压的驱动电压产生单元。

    SLEEP CURRENT ADJUSTING CIRCUIT OF SYSTEM ON CHIP
    3.
    发明申请
    SLEEP CURRENT ADJUSTING CIRCUIT OF SYSTEM ON CHIP 审中-公开
    休眠电流调节系统芯片电路

    公开(公告)号:US20080278139A1

    公开(公告)日:2008-11-13

    申请号:US12105966

    申请日:2008-04-18

    IPC分类号: H02M3/156

    CPC分类号: G11C5/14 G11C5/148

    摘要: There is provided a sleep current adjusting circuit of a system on chip including: a regulator supplying a turn-on voltage and a normal current when a mode selection signal is a normal mode signal, and a turn-off voltage when the mode selection signal is a sleep mode signal; a switching device turned on by the turn-on voltage of the regulator to supply the normal current from the regulator to a main circuit part and a sleep operation circuit part, respectively, and turned off by the turn-off voltage of the regulator to block the normal current from being supplied to the main circuit part and supply the sleep current to the sleep operation circuit part; and a current limit device limiting an operating current flowing in response to the operating voltage and supplying the sleep current to the sleep operation circuit part.

    摘要翻译: 提供了一种片上系统的睡眠电流调节电路,包括:当模式选择信号是正常模式信号时,提供接通电压和正常电流的调节器,以及当模式选择信号为 睡眠模式信号; 开关装置由调节器的导通电压导通,以分别将调节器的正常电流提供给主电路部分和睡眠操作电路部分,并通过调节器的截止电压将其截止以阻止 正常电流被提供给主电路部分并将睡眠电流提供给睡眠操作电路部分; 以及电流限制装置,其限制响应于所述工作电压流动的工作电流并将睡眠电流提供给所述睡眠操作电路部分。

    DUAL MODE WPAN TRANSCEIVER
    4.
    发明申请
    DUAL MODE WPAN TRANSCEIVER 审中-公开
    双模WPAN收发器

    公开(公告)号:US20080137570A1

    公开(公告)日:2008-06-12

    申请号:US11951040

    申请日:2007-12-05

    IPC分类号: H04B7/00 H04L27/00

    摘要: There is provided a dual mode WPAN transceiver including a dual mode WPAN transmitter and a dual mode WPAN receiver. In the dual mode WPAN transceiver, the dual mode WPAN transmitter includes a low-speed spreading transmission block spreading low bit-rate data corresponding to a low data rate in low data rate mode, and a high-speed encoding transmission block encoding high bit-rate data corresponding to a high data rate in high data rate mode, and the dual mode WPAN receiver includes an A/D block converting analog I and Q signals into digital I and Q signals, a differential block obtaining a phase difference between the digital I and Q signals from the A/D unit and complex signals adjacent thereto to offset phase errors of the digital I and Q signals, a low-speed despreading reception unit despreading the digital I and Q signals differentiated by the differential block to detect low bit-rate data in low data rate mode, and a high-speed decoding reception unit decoding the digital I and Q signals differentiated by the differential block to detect high bit-rate data.

    摘要翻译: 提供了一种双模WPAN收发器,包括双模WPAN发送器和双模WPAN接收器。 在双模WPAN收发器中,双模WPAN发送器包括一个低速扩展传输块,它以低数据速率模式扩展对应于低数据速率的低比特率数据,以及一个高位编码传输块, 速率数据对应于高数据速率模式下的高数据速率,双模WPAN接收机包括将模拟I和Q信号转换成数字I和Q信号的A / D块,差分块获得数字I 和来自A / D单元的Q信号和与其相邻的复信号以消除数字I和Q信号的相位误差;低速解扩接收单元解扩由差分块区分的数字I和Q信号,以检测低位 - 低数据速率模式的速率数据,以及对由差分块区分的数字I和Q信号进行解码以检测高比特率数据的高速解码接收单元。

    SYNCHRONIZATION DEVICE AND METHOD FOR WIRELESS COMMUNICATION PACKETS
    5.
    发明申请
    SYNCHRONIZATION DEVICE AND METHOD FOR WIRELESS COMMUNICATION PACKETS 审中-公开
    用于无线通信分组的同步设备和方法

    公开(公告)号:US20080101516A1

    公开(公告)日:2008-05-01

    申请号:US11925121

    申请日:2007-10-26

    IPC分类号: H04L7/02

    CPC分类号: H04L7/08

    摘要: Provided is a synchronization device for wireless communication packets, the synchronization device including an A/D (analog/digital) converter that converts an analog input signal applied from outside into a digital signal; a correlation calculating section that is connected to the A/D converter and correlates the converted input signal with a preset reference code so as to calculate a correlation value; a threshold setting section that is connected to the correlation calculating section and sets a threshold value of the correlation value; a maximum correlation detecting section that is connected to the correlation calculating section and the threshold setting section, compares the correlation value with the threshold value, detects the position of the maximum correlation value within each symbol of the input signal when the correlation value is larger than the threshold value, and judges whether a difference in position between the maximum correlation values of consecutive symbols is equal to the period of one symbol or not; a preamble detecting section that is connected to the correlation calculating section and the maximum correlation detecting section and outputs a preamble detection signal when the difference is equal to the period of one symbol; and a data detecting section that receives data of the input signal when the preamble detection signal is applied.

    摘要翻译: 提供了一种用于无线通信分组的同步装置,该同步装置包括将从外部施加的模拟输入信号转换为数字信号的A / D(模拟/数字)转换器; 相关计算部分,连接到A / D转换器,并将转换的输入信号与预置的参考码相关联,以便计算相关值; 阈值设定部,与相关计算部连接并设定相关值的阈值; 连接到相关计算部分和阈值设定部分的最大相关检测部分将相关值与阈值进行比较,当相关值大于该值时,检测输入信号的每个符号内的最大相关值的位置 阈值,并且判断连续符号的最大相关值之间的位置差是否等于一个符号的周期; 前同步码检测部,其连接到所述相关计算部和所述最大相关检测部,并且当所述差等于一个符号的周期时,输出前同步码检测信号; 以及数据检测部分,当应用前导码检测信号时,接收输入信号的数据。

    DATA TRANSMISSION METHOD INDICATING DATA PENDING IN ZIGBEE NETWORK
    6.
    发明申请
    DATA TRANSMISSION METHOD INDICATING DATA PENDING IN ZIGBEE NETWORK 审中-公开
    数据传输方法表明ZigBee网络中的数据丢失

    公开(公告)号:US20080075005A1

    公开(公告)日:2008-03-27

    申请号:US11860324

    申请日:2007-09-24

    IPC分类号: G08C15/00

    CPC分类号: H04W28/06 H04W48/12 H04W84/18

    摘要: A data transmission method indicating data pending in a ZigBee network is provided, wherein the data transmission method is used to shorten a delay time for data transmission by setting a certain bit to indicate data pending in the ZigBee network to a ZigBee device, the certain bit indicating data pending to an acknowledge frame for acknowledging a data frame from the ZigBee device. The data transmission method according to the present invention includes broadcasting beacons so as to allow the ZigBee coordinator to maintain the connection of the ZigBee network; downloading a data frame from an assigned ZigBee device transmitting the data frame by receiving the beacons; and transmitting an acknowledge frame including a data pending bit indicating data pending to the assigned ZigBee device.

    摘要翻译: 提供了一种指示ZigBee网络中待处理数据的数据传输方法,其中数据传输方法用于通过设置某一位来缩短数据传输的延迟时间,以将ZigBee网络中的待处理数据指示给ZigBee设备,该特定位 将待处理的数据指示到用于确认来自ZigBee设备的数据帧的确认帧。 根据本发明的数据传输方法包括广播信标,以便允许ZigBee协调器维持ZigBee网络的连接; 从分配的ZigBee设备下载数据帧,通过接收信标发送数据帧; 以及发送包括指示数据待处理的数据等待位的确认帧到所分配的ZigBee设备。

    SYMBOL DETECTOR BASED ON FREQUENCY OFFSET COMPENSATION IN ZIGBEE SYSTEM AND SYMBOL DETECTING METHOD THEREOF
    7.
    发明申请
    SYMBOL DETECTOR BASED ON FREQUENCY OFFSET COMPENSATION IN ZIGBEE SYSTEM AND SYMBOL DETECTING METHOD THEREOF 有权
    基于ZIGBEE系统中频率偏移补偿的符号检测器及其符号检测方法

    公开(公告)号:US20070002937A1

    公开(公告)日:2007-01-04

    申请号:US11427771

    申请日:2006-06-29

    IPC分类号: H04B1/707

    摘要: The invention relates to a symbol detector for detecting symbols received in a receive modem of short-range wireless personal area network of a ZigBee system (IEEE 802.15.4). An OQPSK short-range wireless communication system according to the invention acquires frequency offset in a received signal using a symbol contained in a preamble of a packet of the signal, multi-delay-differentiates the signal by a plurality of predetermined delay times, and complex-conjugates the acquired frequency offset to eliminate the frequency offset. Then, the OQPSK short-range wireless communication system according to the invention correlates the received signal with a PN sequence delay-differentiated through the same process to detect the symbols corresponding to the received signal.

    摘要翻译: 本发明涉及一种用于检测在ZigBee系统(IEEE 802.15.4)的短距离无线个域网的接收调制解调器中接收的符号的符号检测器。 根据本发明的OQPSK短距离无线通信系统使用包含在信号分组的前导码中的符号来获取接收信号中的频率偏移,将信号多延迟多个预定延迟时间,并且复数 收集频率偏移以消除频率偏移。 然后,根据本发明的OQPSK短距离无线通信系统将接收到的信号与通过相同处理延迟差分的PN序列相关,以检测对应于接收信号的符号。

    POWER SWITCHING DRIVING APPARATUS, AND POWER FACTOR CORRECTION DEVICE AND POWER SUPPLY DEVICE HAVING THE SAME
    8.
    发明申请
    POWER SWITCHING DRIVING APPARATUS, AND POWER FACTOR CORRECTION DEVICE AND POWER SUPPLY DEVICE HAVING THE SAME 审中-公开
    电源切换驱动装置和功率因数校正装置及具有该功能的电源装置

    公开(公告)号:US20130163289A1

    公开(公告)日:2013-06-27

    申请号:US13405791

    申请日:2012-02-27

    IPC分类号: H03K3/36 G05F1/46 H02M3/335

    摘要: There are provided a power switching driving apparatus able to reduce a circuit area and increase a driving speed, and a power factor correction device and a power supply device having the same. The power switching driving apparatus includes: a first driving unit providing a switching signal in response to a control signal from the outside; a second driving unit including first and second NMOS FETs cascode-connected between an operational power source terminal supplying pre-set operation power and a ground, and performing switching complimentarily in response to the switching signal to provide a switching control signal controlling power switching; a current supply unit supplying a current for driving the second driving unit; and a voltage maintaining unit maintaining a voltage for driving the second driving unit.

    摘要翻译: 提供了能够减小电路面积并提高驱动速度的电力开关驱动装置,以及功率因数校正装置和具有该功率因数校正装置的电源装置。 电源开关驱动装置包括:第一驱动单元,响应于来自外部的控制信号而提供开关信号; 第二驱动单元,包括在提供预置操作功率和地之间的操作电源端子之间并联连接的第一和第二NMOS FET,以及响应于所述切换信号而补充地进行切换以提供控制功率切换的开关控制信号; 提供用于驱动第二驱动单元的电流的电流供应单元; 以及保持用于驱动第二驱动单元的电压的电压保持单元。

    MULTI-VOLTAGE REGULATOR
    9.
    发明申请
    MULTI-VOLTAGE REGULATOR 审中-公开
    多电平稳压器

    公开(公告)号:US20120169305A1

    公开(公告)日:2012-07-05

    申请号:US13329942

    申请日:2011-12-19

    IPC分类号: G05F1/10

    CPC分类号: G05F3/24

    摘要: Disclosed herein is a multi-voltage regulator. The multi-voltage regulator includes an error amplifier amplifying a difference voltage between a predetermined reference voltage and a received feedback voltage; a first voltage adjusting part connected to an output terminal of the error amplifier, the first voltage adjusting part regulating a level of a voltage at a power input terminal to output the regulated voltage to a first output terminal; a second voltage adjusting part connected to the output terminal of the error amplifier, the second voltage adjusting part regulating the level of the voltage at the power input terminal to output the regulated voltage to a second output terminal; and a voltage detector detecting a voltage according to a voltage at the first output terminal and a voltage at the second output terminal to supply the detected voltage as the feedback voltage.

    摘要翻译: 这里公开了一种多电压调节器。 多电压调节器包括误差放大器,放大预定参考电压和接收反馈电压之间的差分电压; 第一电压调节部分连接到误差放大器的输出端子,第一电压调节部分调节电源输入端子处的电压电平,以将调节电压输出到第一输出端子; 第二电压调节部分连接到误差放大器的输出端子,第二电压调节部分调节电源输入端子处的电压电平以将调节电压输出到第二输出端子; 以及电压检测器,根据第一输出端子处的电压和第二输出端子处的电压来检测电压,以将检测到的电压提供为反馈电压。

    APPARATUS AND SYSTEM FOR VIEWING 3D IMAGE
    10.
    发明申请
    APPARATUS AND SYSTEM FOR VIEWING 3D IMAGE 有权
    用于查看3D图像的装置和系统

    公开(公告)号:US20110254756A1

    公开(公告)日:2011-10-20

    申请号:US12827026

    申请日:2010-06-30

    IPC分类号: G09G5/00

    摘要: An apparatus and a system for viewing a 3D image including a synchronization signal receiver for receiving 3D image synchronization signal; a 3D control signal generator for generating left-eye glass control signal and a right-eye glass control signal in accordance with the synchronization signal received; a left-eye glass that opens or intercepts light transmitted to the left-eye glass; a right-eye glass that opens or intercepts light transmitted to the right-eye glass; a central processor that controls operation of the 3D control signal generator and transmits the synchronization signal to the 3D control signal generator; and a power controller that connects or intercepts power supplied to the synchronization signal receiver and the central processor. The power consumption of the apparatus is minimized by supplying power to the synchronization signal receiver and the central processor at a time when the synchronization signal is received and power is intercepted during the rest period.

    摘要翻译: 一种用于观看包括用于接收3D图像同步信号的同步信号接收器的3D图像的装置和系统; 用于根据所接收的同步信号产生左眼玻璃控制信号和右眼玻璃控制信号的3D控制信号发生器; 打开或拦截透射到左眼玻璃的光的左眼玻璃; 打开或拦截透射到右眼玻璃的光的右眼玻璃; 控制3D控制信号发生器的操作并将同步信号发送到3D控制信号发生器的中央处理器; 以及功率控制器,其连接或截取提供给同步信号接收器和中央处理器的功率。 在同步信号被接收并且在休息期间被截取电力的时刻,通过向同步信号接收机和中央处理器供电来使设备的功耗最小化。