Method of processing moving picture and apparatus thereof
    2.
    发明授权
    Method of processing moving picture and apparatus thereof 有权
    运动图像处理方法及其装置

    公开(公告)号:US08345742B2

    公开(公告)日:2013-01-01

    申请号:US12598199

    申请日:2008-06-04

    IPC分类号: G06F17/30

    摘要: A method of processing moving picture and an apparatus thereof are disclosed. A method of processing a moving picture comprising: calculating a color distribution vector for each of plural sub-frames which are generated by dividing a frame of the moving picture; generating a first order differential of the color distribution vector based on the color distribution vector; generating a second order differential of the color distribution vector based on the first order differential of the color distribution vector; and generating a feature vector of the frame based on the color distribution vector, the first order differential of the color distribution vector and the second order differential of the color distribution vector, is provided. The moving picture processing method can provide an efficient mean to determine commonality between moving pictures by extracting a feature from a frame of the moving pictures.

    摘要翻译: 公开了一种处理运动图像的方法及其装置。 一种处理运动图像的方法,包括:计算通过划分运动图像的帧而产生的多个子帧中的每一个的颜色分布向量; 基于颜色分布向量生成颜色分布向量的一阶微分; 基于所述颜色分布向量的一阶微分产生所述颜色分布向量的二阶微分; 并且基于颜色分布向量生成该帧的特征向量,提供颜色分布向量的一阶微分和颜色分布向量的二阶微分。 运动图像处理方法可以通过从运动图像的帧中提取特征来提供确定运动图像之间的共同性的有效手段。

    RF RECEIVER HAVING TIMING OFFSET RECOVERY FUNCTION AND TIMING OFFSET RECOVERY METHOD USING THEREOF
    3.
    发明申请
    RF RECEIVER HAVING TIMING OFFSET RECOVERY FUNCTION AND TIMING OFFSET RECOVERY METHOD USING THEREOF 有权
    具有时序偏移功能的RF接收器和使用其的时序偏移恢复方法

    公开(公告)号:US20090168937A1

    公开(公告)日:2009-07-02

    申请号:US12137463

    申请日:2008-06-11

    IPC分类号: H04L7/00

    CPC分类号: H04L7/043 H04B1/7075

    摘要: There is provided an RF receiver recovering timing offset by shifting timing slots in response to timing offset occurring when a signal is sampled. An RF receiver having timing offset recovery function according to an aspect of the invention includes: a preprocessing unit sampling and digitalizing an analog received signal; a differential operation unit delaying the digitalized received signal from the preprocessing unit for predetermined periods of time and differentiating the delayed signals; a correlation unit correlating the differentiated received signals from the differential operation unit with a plurality of predetermined PN code sequences and sequentially outputting correlation values; a setting unit sequentially storing the correlation values from the correlation unit, detecting a maximum value among the stored correlation values, and shifting a plurality of determination slots by a difference between a storage location of the detected maximum value and a reference storage location; and a demodulation value estimation unit estimating as a demodulation value of the received signal, a symbol of a PN code sequence corresponding to the maximum value from the shifted determination slots.

    摘要翻译: 提供了一种RF接收器,通过响应于在采样信号时发生的定时偏移来移位定时时隙来恢复定时偏移。 具有根据本发明的一个方面的具有定时偏移恢复功能的RF接收机包括:预处理单元,对模拟接收信号进行采样和数字化; 差分操作单元延迟来自预处理单元的数字化接收信号预定时间段并且对延迟信号进行微分; 相关单元,将来自差分操作单元的差分接收信号与多个预定PN码序列相关,并且顺序地输出相关值; 设置单元,其顺序地存储来自所述相关单元的相关值,检测所存储的相关值中的最大值,并且通过所检测的最大值的存储位置与参考存储位置之间的差移动多个确定时隙; 以及解调值估计单元,作为所述接收信号的解调值,从所述移位的确定时隙估计与所述最大值对应的PN码序列的符号。

    Connector and apparatus of driving liquid crystal display using the same
    4.
    发明授权
    Connector and apparatus of driving liquid crystal display using the same 有权
    使用其驱动液晶显示器的连接器和装置

    公开(公告)号:US07518600B2

    公开(公告)日:2009-04-14

    申请号:US10682924

    申请日:2003-10-14

    申请人: Jae Hyung Lee

    发明人: Jae Hyung Lee

    IPC分类号: G09G5/00

    CPC分类号: G09G5/003

    摘要: A liquid crystal display includes a liquid crystal display panel; a drive system for transmitting signals over a predetermined number of channels and for displaying a picture on the liquid crystal display panel; an interface part generating a channel mode signal in accordance with the predetermined number of channels; and a timing controller driven in correspondence with the generated channel mode signal.

    摘要翻译: 液晶显示器包括液晶显示面板; 用于在预定数量的通道上传输信号并用于在液晶显示面板上显示图像的驱动系统; 接口部分,根据预定数量的信道产生信道模式信号; 以及与所生成的通道模式信号相对应地驱动的定时控制器。

    Liquid crystal display with 2-port data polarity inverter and method of driving the same
    5.
    发明授权
    Liquid crystal display with 2-port data polarity inverter and method of driving the same 有权
    液晶显示器采用2端口数据极性反相器及其驱动方法

    公开(公告)号:US07456814B2

    公开(公告)日:2008-11-25

    申请号:US10029848

    申请日:2001-12-31

    IPC分类号: G09G3/36

    摘要: The specification and drawings describe and show embodiments of the present invention in the form of a liquid crystal display with a 2-port data polarity inverter. More specifically, the liquid crystal display includes a liquid crystal polarity inversion driver determining whether a polarity of a liquid crystal is inverted and inverting the polarity of the liquid crystal in accordance with the determined result, a first data polarity inversion driver determining whether a first data transition is occurred in first data inverting the polarity of the first data in accordance with the determined result, and a second data polarity inversion driver determining whether a second data transition is occurred and inverting the polarity of the second data in accordance with the determined result.

    摘要翻译: 说明书和附图以具有2端口数据极性反相器的液晶显示器的形式描述并示出了本发明的实施例。 更具体地,液晶显示器包括液晶极性反转驱动器,其根据确定的结果确定液晶的极性是否反转并且液晶的极性反转,第一数据极性反转驱动器确定第一数据 根据确定的结果反转第一数据的极性的第一数据发生转变,以及根据确定的结果确定是否发生第二数据转换并反转第二数据的极性的第二数据极性反转驱动器。

    DUAL MODE WPAN TRANSCEIVER
    6.
    发明申请
    DUAL MODE WPAN TRANSCEIVER 审中-公开
    双模WPAN收发器

    公开(公告)号:US20080137570A1

    公开(公告)日:2008-06-12

    申请号:US11951040

    申请日:2007-12-05

    IPC分类号: H04B7/00 H04L27/00

    摘要: There is provided a dual mode WPAN transceiver including a dual mode WPAN transmitter and a dual mode WPAN receiver. In the dual mode WPAN transceiver, the dual mode WPAN transmitter includes a low-speed spreading transmission block spreading low bit-rate data corresponding to a low data rate in low data rate mode, and a high-speed encoding transmission block encoding high bit-rate data corresponding to a high data rate in high data rate mode, and the dual mode WPAN receiver includes an A/D block converting analog I and Q signals into digital I and Q signals, a differential block obtaining a phase difference between the digital I and Q signals from the A/D unit and complex signals adjacent thereto to offset phase errors of the digital I and Q signals, a low-speed despreading reception unit despreading the digital I and Q signals differentiated by the differential block to detect low bit-rate data in low data rate mode, and a high-speed decoding reception unit decoding the digital I and Q signals differentiated by the differential block to detect high bit-rate data.

    摘要翻译: 提供了一种双模WPAN收发器,包括双模WPAN发送器和双模WPAN接收器。 在双模WPAN收发器中,双模WPAN发送器包括一个低速扩展传输块,它以低数据速率模式扩展对应于低数据速率的低比特率数据,以及一个高位编码传输块, 速率数据对应于高数据速率模式下的高数据速率,双模WPAN接收机包括将模拟I和Q信号转换成数字I和Q信号的A / D块,差分块获得数字I 和来自A / D单元的Q信号和与其相邻的复信号以消除数字I和Q信号的相位误差;低速解扩接收单元解扩由差分块区分的数字I和Q信号,以检测低位 - 低数据速率模式的速率数据,以及对由差分块区分的数字I和Q信号进行解码以检测高比特率数据的高速解码接收单元。

    SYNCHRONIZATION DEVICE AND METHOD FOR WIRELESS COMMUNICATION PACKETS
    7.
    发明申请
    SYNCHRONIZATION DEVICE AND METHOD FOR WIRELESS COMMUNICATION PACKETS 审中-公开
    用于无线通信分组的同步设备和方法

    公开(公告)号:US20080101516A1

    公开(公告)日:2008-05-01

    申请号:US11925121

    申请日:2007-10-26

    IPC分类号: H04L7/02

    CPC分类号: H04L7/08

    摘要: Provided is a synchronization device for wireless communication packets, the synchronization device including an A/D (analog/digital) converter that converts an analog input signal applied from outside into a digital signal; a correlation calculating section that is connected to the A/D converter and correlates the converted input signal with a preset reference code so as to calculate a correlation value; a threshold setting section that is connected to the correlation calculating section and sets a threshold value of the correlation value; a maximum correlation detecting section that is connected to the correlation calculating section and the threshold setting section, compares the correlation value with the threshold value, detects the position of the maximum correlation value within each symbol of the input signal when the correlation value is larger than the threshold value, and judges whether a difference in position between the maximum correlation values of consecutive symbols is equal to the period of one symbol or not; a preamble detecting section that is connected to the correlation calculating section and the maximum correlation detecting section and outputs a preamble detection signal when the difference is equal to the period of one symbol; and a data detecting section that receives data of the input signal when the preamble detection signal is applied.

    摘要翻译: 提供了一种用于无线通信分组的同步装置,该同步装置包括将从外部施加的模拟输入信号转换为数字信号的A / D(模拟/数字)转换器; 相关计算部分,连接到A / D转换器,并将转换的输入信号与预置的参考码相关联,以便计算相关值; 阈值设定部,与相关计算部连接并设定相关值的阈值; 连接到相关计算部分和阈值设定部分的最大相关检测部分将相关值与阈值进行比较,当相关值大于该值时,检测输入信号的每个符号内的最大相关值的位置 阈值,并且判断连续符号的最大相关值之间的位置差是否等于一个符号的周期; 前同步码检测部,其连接到所述相关计算部和所述最大相关检测部,并且当所述差等于一个符号的周期时,输出前同步码检测信号; 以及数据检测部分,当应用前导码检测信号时,接收输入信号的数据。

    Data output circuit, data output method, and semiconductor memory device
    8.
    发明授权
    Data output circuit, data output method, and semiconductor memory device 失效
    数据输出电路,数据输出方式和半导体存储器件

    公开(公告)号:US07227795B2

    公开(公告)日:2007-06-05

    申请号:US11316848

    申请日:2005-12-22

    申请人: Jae-Hyung Lee

    发明人: Jae-Hyung Lee

    IPC分类号: G11C7/00

    摘要: In a data output circuit, a data output method, and a semiconductor memory device, the data output circuit includes: an internal clock generation unit that delays an external clock signal by a first delay time to output an internal clock signal in response to the external clock signal and a replica data strobe signal; a data strobe signal output unit that outputs a data strobe signal in response to the internal clock signal; and a data strobe signal replication unit that delays the internal clock signal by a second delay time to output the replica data strobe signal and changing the second delay time in response to the data strobe signal and the replica data strobe signal. Accordingly, it is possible to save time and effort required for setting a delay time of a data strobe signal replication unit. In addition, it is possible to correct differences between packages of the delay time of the data strobe signal output unit.

    摘要翻译: 在数据输出电路,数据输出方法和半导体存储器件中,数据输出电路包括:内部时钟产生单元,其将外部时钟信号延迟第一延迟时间,以响应于外部时钟信号输出内部时钟信号 时钟信号和复制数据选通信号; 数据选通信号输出单元,其响应于所述内部时钟信号而输出数据选通信号; 以及数据选通信号复制单元,其将内部时钟信号延迟第二延迟时间以输出复制数据选通信号,并响应于数据选通信号和复制数据选通信号而改变第二延迟时间。 因此,可以节省设置数据选通信号复制单元的延迟时间所需的时间和精力。 此外,可以校正数据选通信号输出单元的延迟时间的包之间的差异。

    Data output circuit, data output method, and semiconductor memory device
    9.
    发明申请
    Data output circuit, data output method, and semiconductor memory device 失效
    数据输出电路,数据输出方式和半导体存储器件

    公开(公告)号:US20060140022A1

    公开(公告)日:2006-06-29

    申请号:US11316848

    申请日:2005-12-22

    申请人: Jae-Hyung Lee

    发明人: Jae-Hyung Lee

    IPC分类号: G11C7/00

    摘要: In a data output circuit, a data output method, and a semiconductor memory device, the data output circuit includes: an internal clock generation unit that delays an external clock signal by a first delay time to output an internal clock signal in response to the external clock signal and a replica data strobe signal; a data strobe signal output unit that outputs a data strobe signal in response to the internal clock signal; and a data strobe signal replication unit that delays the internal clock signal by a second delay time to output the replica data strobe signal and changing the second delay time in response to the data strobe signal and the replica data strobe signal. Accordingly, it is possible to save time and effort required for setting a delay time of a data strobe signal replication unit. In addition, it is possible to correct differences between packages of the delay time of the data strobe signal output unit.

    摘要翻译: 在数据输出电路,数据输出方法和半导体存储器件中,数据输出电路包括:内部时钟产生单元,其将外部时钟信号延迟第一延迟时间,以响应于外部时钟信号输出内部时钟信号 时钟信号和复制数据选通信号; 数据选通信号输出单元,其响应于所述内部时钟信号而输出数据选通信号; 以及数据选通信号复制单元,其将内部时钟信号延迟第二延迟时间以输出复制数据选通信号,并响应于数据选通信号和复制数据选通信号而改变第二延迟时间。 因此,可以节省设置数据选通信号复制单元的延迟时间所需的时间和精力。 此外,可以校正数据选通信号输出单元的延迟时间的包之间的差异。

    Method and apparatus for controlling idle speed of an engine
    10.
    发明授权
    Method and apparatus for controlling idle speed of an engine 有权
    用于控制发动机怠速的方法和装置

    公开(公告)号:US06834638B2

    公开(公告)日:2004-12-28

    申请号:US10334928

    申请日:2002-12-31

    申请人: Jae-Hyung Lee

    发明人: Jae-Hyung Lee

    IPC分类号: F02P515

    摘要: The invention discloses a method and apparatus for controlling the idle speed of an engine that provides uniform control efficiency and rapid control response. An embodiment of the invention activates the ignition system based on a target ignition timing, which corresponds to a target torque ratio and is found using a predetermined relationship between ignition timing and torque ratio. The target torque ratio is calculated based on engine speed and engine load.

    摘要翻译: 本发明公开了一种用于控制发动机怠速的方法和装置,其提供均匀的控制效率和快速的控制响应。 本发明的实施例基于目标点火正时启动点火系统,该点火正时对应于目标扭矩比,并且使用点火正时和扭矩比之间的预定关系来发现。 目标扭矩比根据发动机转速和发动机负荷计算。