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1.发明授权Automatic gain control and tuned low noise amplifier for process-independent gain systems 失效用于过程无关增益系统的自动增益控制和调谐低噪声放大器公开(公告)号：US07471152B2
公开(公告)日：2008-12-30
申请号：US11273376
申请日：2005-11-14
IPC分类号： H03F3/04
CPC分类号： H03M1/0607 , G01R31/2884 , G01R31/31715 , G01R31/31721 , G01S19/235 , G01S19/34 , G01S19/35 , G06F1/08 , H03F3/189 , H03F2200/294 , H03F2200/372 , H03L7/099 , H03L7/10 , H03L7/18
摘要： A tuned low-noise amplifier is disclosed. A device in accordance with the present invention comprises a first current source, a second current source, a comparator, coupled to the first current source and the second current source, for providing a control signal, and a third current source, receiving the control signal and coupled to the tuned low-noise amplifier, wherein a current in the third current source is proportional to a current in the first current source and the second current source, where values of the first current source, the second current source, and the third current source are based on a quasi-Proportional-To-Absolute-Temperature (PTAT) curve.
摘要翻译： 公开了调谐低噪声放大器。 根据本发明的装置包括耦合到第一电流源和第二电流源的用于提供控制信号的第一电流源，第二电流源，比较器和接收控制信号的第三电流源 并且耦合到调谐低噪声放大器，其中第三电流源中的电流与第一电流源和第二电流源中的电流成比例，其中第一电流源，第二电流源和第三电流源的值 电流源基于准比例 - 绝对温度（PTAT）曲线。
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2.发明授权Two-bit offset cancelling A/D converter with improved common mode rejection and threshold sensitivity 有权具有改进的共模抑制和阈值灵敏度的两位偏移消除A / D转换器公开(公告)号：US07379008B2
公开(公告)日：2008-05-27
申请号：US11611276
申请日：2006-12-15
申请人： Rabih Makarem , Kwai-Kwong K. Lam
发明人： Rabih Makarem , Kwai-Kwong K. Lam
IPC分类号： H03M1/12
CPC分类号： H03M1/0607 , G01R31/2884 , G01R31/31715 , G01R31/31721 , G01S19/235 , G01S19/34 , G01S19/35 , G06F1/08 , H03F3/189 , H03F2200/294 , H03F2200/372 , H03L7/099 , H03L7/10 , H03L7/18
摘要： A two-bit offset canceling A/D converter with improved common mode rejection and threshold sensitivity for use in GPS receivers. A device in accordance with the present invention comprises a level shifter, the level shifter receiving a positive signal and a negative signal, the level shifter shifting the positive signal and the negative signal such that a difference between the positive signal and the negative signal is larger than a threshold value, and a comparator, coupled to the level shifter, the comparator providing as outputs of the comparators a sign bit and two magnitude bits wherein the comparator comprises a plurality of switched capacitor amplifiers.
摘要翻译： 具有改进的共模抑制和阈值灵敏度的两位偏移消除A / D转换器，用于GPS接收机。 根据本发明的装置包括电平移位器，电平移位器接收正信号和负信号，电平移位器将正信号和负信号移位，使得正信号和负信号之间的差较大 比较器，耦合到电平移位器，比较器提供比较器的输出，符号位和两个幅度位，其中比较器包括多个开关电容放大器。
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3.发明授权Two-bit offset cancelling A/D converter with improved common mode rejection and threshold sensitivity 失效具有改进的共模抑制和阈值灵敏度的两位偏移消除A / D转换器公开(公告)号：US07170437B2
公开(公告)日：2007-01-30
申请号：US11271729
申请日：2005-11-10
申请人： Rabih Makarem , Kwai-Kwong K. Lam
发明人： Rabih Makarem , Kwai-Kwong K. Lam
IPC分类号： H03M1/12
CPC分类号： H03M1/0607 , G01R31/2884 , G01R31/31715 , G01R31/31721 , G01S19/235 , G01S19/34 , G01S19/35 , G06F1/08 , H03F3/189 , H03F2200/294 , H03F2200/372 , H03L7/099 , H03L7/10 , H03L7/18
摘要： A two-bit offset canceling A/D converter with improved common mode rejection and threshold sensitivity for use in GPS receivers. A device in accordance with the present invention comprises a level shifter, the level shifter receiving a positive signal and a negative signal, the level shifter shifting the positive signal and the negative signal such that a difference between the positive signal and the negative signal is larger than a threshold value, and a comparator, coupled to the level shifter, the comparator providing as outputs of the comparators a sign bit and two magnitude bits wherein the comparator comprises a plurality of switched capacitor amplifiers.
摘要翻译： 具有改进的共模抑制和阈值灵敏度的两位偏移消除A / D转换器，用于GPS接收机。 根据本发明的装置包括电平移位器，电平移位器接收正信号和负信号，电平移位器将正信号和负信号移位，使得正信号和负信号之间的差较大 比较器，耦合到电平移位器，比较器提供比较器的输出，符号位和两个幅度位，其中比较器包括多个开关电容放大器。
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4.发明授权Automatic mode setting and power ramp compensator for system power on conditions 有权自动模式设置和电源斜坡补偿器，用于系统上电状态公开(公告)号：US07505739B2
公开(公告)日：2009-03-17
申请号：US11271342
申请日：2005-11-10
IPC分类号： H04B17/00
CPC分类号： H03M1/0607 , G01R31/2884 , G01R31/31715 , G01R31/31721 , G01S19/235 , G01S19/34 , G01S19/35 , G06F1/08 , H03F3/189 , H03F2200/294 , H03F2200/372 , H03L7/099 , H03L7/10 , H03L7/18
摘要： A GPS receiver with automatic mode-setting and power ramping circuitry is disclosed. AGPS receiver in accordance with the present invention comprises a first switch network, comprising a plurality of transistors, a first plurality of circuit components, coupled to the first switch network, wherein the switch network selects paths through the circuit components to generate a Power On Signal (POS) and ramp power to the GPS receiver, a plurality of test points, coupled to circuitry within the GPS receiver, wherein the test points are used to test intermediate stages of output of the GPS receiver, a second plurality of circuit components, each circuit component coupled to a corresponding test point in a respective manner, wherein the circuit components create outputs used in initialization of the GPS receiver, and a second switch network, coupled between the circuitry in the GPS receiver and the plurality of test points, for selectively switching the plurality of test points from being used to test intermediate stages of output of the GPS receiver and creating outputs used in initialization.
摘要翻译： 公开了一种具有自动模式设置和功率斜坡电路的GPS接收机。 根据本发明的AGPS接收机包括第一开关网络，其包括多个晶体管，耦合到第一开关网络的第一多个电路部件，其中开关网络选择通过电路部件的路径以产生上电信号 （POS）和对GPS接收机的斜坡功率，耦合到GPS接收机内的电路的多个测试点，其中测试点用于测试GPS接收机的输出的中间阶段，第二多个电路组件，每个 电路组件以相应的方式耦合到对应的测试点，其中电路组件创建在GPS接收机的初始化中使用的输出，以及耦合在GPS接收器中的电路与多个测试点之间的第二开关网络，用于选择性地 将多个测试点切换为用于测试GPS接收机的输出的中间阶段并创建使用的输出 在初始化时。
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