公开(公告)号：US07450391B2

公开(公告)日：2008-11-11

申请号：US11306462

申请日：2005-12-29

申请人： Yun-Lung Chen ,  Lin Ding

发明人： Yun-Lung Chen ,  Lin Ding

IPC分类号： H05K5/00

CPC分类号： G06F1/181

摘要： A computer front bezel includes a bezel body (10), a cover (20) pivotably attached to the bezel body, and a connecting bar (30) connecting with the bezel body and the cover. The cover has an open position and a closed position. The connecting bar has first and second end portions. When the connecting bar is located in the first position, the cover is supported by the connecting bar, and lies in the open position, and when the connecting bar is located in the second position, the cover lies in the closed position.

摘要翻译： 计算机前挡板包括挡板主体（10），可枢转地附接到挡板主体的盖（20）和与挡板主体和盖连接的连接杆（30）。 盖子有打开位置和关闭位置。 连接杆具有第一和第二端部。 当连接杆位于第一位置时，盖由连接杆支撑并处于打开位置，当连接杆位于第二位置时，盖位于关闭位置。

公开(公告)号：USD518481S1

公开(公告)日：2006-04-04

申请号：US29224649

申请日：2005-03-03

申请人： Yun-Lung Chen ,  Hong-Jin Wu ,  Lin Ding ,  Zhou Xu ,  Chuan-Lin Zheng ,  Yi-Wen Feng

设计人： Yun-Lung Chen ,  Hong-Jin Wu ,  Lin Ding ,  Zhou Xu ,  Chuan-Lin Zheng ,  Yi-Wen Feng

公开(公告)号：US06306720B1

公开(公告)日：2001-10-23

申请号：US09492563

申请日：2000-01-27

申请人： Yen-Lin Ding

发明人： Yen-Lin Ding

IPC分类号： H01L2120

CPC分类号： H01L29/66181 ,  H01L29/945

摘要： A method of forming a capacitor of a mixed-mode device is described. Trenches used for forming a trench-type capacitor are simultaneously formed in a provided substrate while forming a shallow trench isolation. A conductive region used as a lower electrode is formed by ion implantation. A gate oxide layer, used for dielectric film, and a polysilicon layer, used as a gate and an upper electrode, are formed over the substrate and over the trenches. A trench-type capacitor is thus formed.

摘要翻译： 描述了形成混合模式装置的电容器的方法。 用于形成沟槽型电容器的沟槽在形成浅沟槽隔离的同时在所提供的衬底中同时形成。 通过离子注入形成用作下电极的导电区域。 用于电介质膜的栅极氧化物层和用作栅极和上部电极的多晶硅层形成在衬底上并在沟槽之上。 由此形成沟槽型电容器。

公开(公告)号：US06294812B1

公开(公告)日：2001-09-25

申请号：US09306119

申请日：1999-05-06

申请人： Yen-Lin Ding ,  Gary Hong

发明人： Yen-Lin Ding ,  Gary Hong

IPC分类号： H01L29788

CPC分类号： H01L27/11521 ,  H01L27/115

摘要： A flash memory cell. A spacer is formed on a sidewall of a controlling gate. A self-aligned source/drain region can thus be formed by the formation of the spacer. The tunneling oxide layer is then formed on the source/drain region instead of on the controlling gate. Thus, the tunneling oxide layer is formed with a self-aligned process.

摘要翻译： 闪存单元。 在控制门的侧壁上形成间隔物。 因此，可以通过形成间隔物来形成自对准的源极/漏极区域。 隧道氧化层然后形成在源/漏区而不是在控制栅上。 因此，隧道氧化物层由自对准工艺形成。

公开(公告)号：US6153472A

公开(公告)日：2000-11-28

申请号：US241544

申请日：1999-02-01

申请人： Yen-Lin Ding ,  Gary Hong

发明人： Yen-Lin Ding ,  Gary Hong

IPC分类号： H01L21/8247

CPC分类号： H01L27/11521

摘要： A method for fabricating a flash memory is provided. The method contains sequentially forming a tunneling oxide layer, a polysilicon layer, and a silicon nitride layer on a semiconductor substrate. Patterning the silicon nitride layer, polysilicon layer, the tunneling oxide layer, and the substrate forms a trench in the substrate. A shallow trench isolation (STI) structure is formed to fill the trench up the silicon nitride layer. The silicon nitride layer is removed to expose the polysilicon layer and a portion of each sidewall of the STI structure. A polysilicon spacer is formed on each exposed sidewall of the STI structure. An upper portion of the STI structure is removed so as to expose a portion of each sidewall of the polysilicon layer. The polysilicon layer serves as a floating gate. A conformal dielectric layer and a top polysilicon layer are formed over the substrate. The top polysilicon layer, the dielectric layer, and the polysilicon layer are patterned to form a strip control gate, which covers the floating gate, that is a remaining portion of the polysilicon layer on the tunneling oxide layer.

摘要翻译： 提供一种制造闪存的方法。 该方法包括在半导体衬底上依次形成隧道氧化物层，多晶硅层和氮化硅层。 对氮化硅层，多晶硅层，隧道氧化物层和衬底进行图案化，在衬底中形成沟槽。 形成浅沟槽隔离（STI）结构以填充氮化硅层的沟槽。 去除氮化硅层以暴露多晶硅层和STI结构的每个侧壁的一部分。 在STI结构的每个暴露的侧壁上形成多晶硅间隔物。 去除STI结构的上部，以暴露多晶硅层的每个侧壁的一部分。 多晶硅层用作浮栅。 在衬底上方形成保形电介质层和顶部多晶硅层。 图案化顶部多晶硅层，电介质层和多晶硅层以形成带状控制栅极，该栅极控制栅极覆盖浮动栅极，该浮栅是隧道氧化物层上的多晶硅层的剩余部分。

公开(公告)号：US6114204A

公开(公告)日：2000-09-05

申请号：US306348

申请日：1999-05-06

申请人： Yen-Lin Ding ,  Gary Hong

发明人： Yen-Lin Ding ,  Gary Hong

IPC分类号： H01L21/8247 ,  H01L21/336 ,  H01L21/3205 ,  H01L21/4763

CPC分类号： H01L27/11521

摘要： A method of fabricating a flash memory cell. A spacer is formed on a sidewall of a controlling gate. A self-aligned source/drain region can thus be formed by the formation of the spacer. The tunneling oxide layer is then formed on the source/drain region instead of on the controlling gate. Thus, the tunneling oxide layer is formed with a self-aligned process.

摘要翻译： 一种制造闪存单元的方法。 在控制门的侧壁上形成间隔物。 因此，可以通过形成间隔物来形成自对准的源极/漏极区域。 隧道氧化层然后形成在源/漏区而不是在控制栅上。 因此，隧道氧化物层由自对准工艺形成。

公开(公告)号：US6048768A

公开(公告)日：2000-04-11

申请号：US267760

申请日：1999-03-11

申请人： Yen-Lin Ding ,  Gary Hong

发明人： Yen-Lin Ding ,  Gary Hong

IPC分类号： H01L21/8247 ,  H01L27/115 ,  H01L21/336

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A method for manufacturing a flash memory. A substrate having a patterned pad oxide layer formed thereon and a patterned mask layer on the pad oxide layer is provided. A doped region is formed in the substrate exposed by the patterned mask layer and the pad oxide layer. A spacer is formed on the sidewall of the patterned mask layer and the pad oxide layer to cover a portion of the doped region. A trench is formed in the substrate exposed by the mask layer and the spacer. An insulating layer is formed to fill the trench, wherein the insulating layer leveled with a top surface of the patterned mask layer. The patterned mask layer and the spacer are removed to respectively expose the patterned oxide layer and the portion of the doped region. A self-aligned tunnel oxide layer is formed on the portion of the doped region. A patterned first conductive layer is formed over the substrate to expose portions of the patterned pad oxide layer above the substrate excluding the doped region. A self-aligned doped region is formed in the substrate under the patterned pad oxide layer exposed by the patterned first conductive layer. A dielectric layer is formed on the patterned first conductive layer and the self-aligned doped region. A patterned second conductive layer is formed over the substrate.

摘要翻译： 一种用于制造闪速存储器的方法。 提供其上形成有图案化的衬垫氧化物层的衬底和衬垫氧化物层上的图案化掩模层。 在由图案化掩模层和衬垫氧化物层暴露的衬底中形成掺杂区域。 在图案化掩模层的侧壁和衬垫氧化物层上形成间隔物以覆盖掺杂区域的一部分。 在由掩模层和间隔物暴露的衬底中形成沟槽。 形成绝缘层以填充沟槽，其中绝缘层与图案化掩模层的顶表面平齐。 去除图案化的掩模层和间隔物以分别暴露图案化氧化物层和掺杂区域的部分。 在掺杂区域的部分上形成自对准的隧道氧化物层。 图案化的第一导电层形成在衬底上，以暴露除了掺杂区域之外的衬底上的图案化衬垫氧化物层的部分。 在由图案化的第一导电层暴露的图案化的衬垫氧化物层下面的衬底中形成自对准掺杂区域。 在图案化的第一导电层和自对准掺杂区上形成介电层。 在衬底上形成图案化的第二导电层。

公开(公告)号：US20130033896A1

公开(公告)日：2013-02-07

申请号：US13443260

申请日：2012-04-10

申请人： YUN-LUNG CHEN ,  LIANG-CHIN WANG ,  LIN DING ,  CHUAN LIN

发明人： YUN-LUNG CHEN ,  LIANG-CHIN WANG ,  LIN DING ,  CHUAN LIN

IPC分类号： F21V8/00

CPC分类号： G06F1/181 ,  G02B6/001

摘要： An electronic device includes a frame, a front panel secured to the frame, two light sources secured to the front panel, and a light bar. The frame includes a first sidewall, a second sidewall, and a top wall connected to the first sidewall and the second sidewall. A first supporting portion is located between the first sidewall and the top wall. A second supporting portion is located between the second sidewall and the top wall. The top wall, the first supporting portion, and the second supporting portion cooperatively define an installation hole. A light bar includes a body including a bridge and a light guiding portion located on the bridge. The bridge is located on the supporting portion and the second supporting portion. The light guiding portion is engaged in the installation hole. Two light sources are aligned with two opposite sides of the light guiding portion.

摘要翻译： 电子设备包括框架，固定到框架的前面板，固定到前面板的两个光源和灯条。 框架包括第一侧壁，第二侧壁和连接到第一侧壁和第二侧壁的顶壁。 第一支撑部分位于第一侧壁和顶壁之间。 第二支撑部分位于第二侧壁和顶壁之间。 顶壁，第一支撑部分和第二支撑部分协作地限定安装孔。 灯杆包括主体，其包括桥和位于桥上的导光部。 桥梁位于支撑部分和第二支撑部分上。 导光部分接合在安装孔中。 两个光源与导光部分的两个相对的两侧对齐。

公开(公告)号：US07388759B2

公开(公告)日：2008-06-17

申请号：US11321164

申请日：2005-12-29

申请人： Yun-Lung Chen ,  Lin Ding

发明人： Yun-Lung Chen ,  Lin Ding

IPC分类号： H05K7/18

CPC分类号： H05K7/1408 ,  G06F1/186

摘要： A mounting assembly includes a chassis having a wall, a fastener pivotally attached to the wall, and a cover detachably attached to the chassis. The wall forms a support portion for supporting a slot cover of an expansion card thereon. The fastener includes a pressing portion for pressing the slot cover against the support portion when the fastener is pivoted to a locked position. The cover is engagable with the fastener to secure the fastener in the locked position.

摘要翻译： 安装组件包括具有壁的底盘，可枢转地附接到壁的紧固件和可拆卸地附接到底架的盖。 壁形成用于在其上支撑扩展卡的槽盖的支撑部分。 紧固件包括按压部分，用于当紧固件枢转到锁定位置时将狭槽盖压靠在支撑部分上。 盖子可与紧固件接合以将紧固件固定在锁定位置。

公开(公告)号：US07253359B2

公开(公告)日：2007-08-07

申请号：US11188358

申请日：2005-07-25

申请人： Yun-Lung Chen ,  Lin Ding

发明人： Yun-Lung Chen ,  Lin Ding

IPC分类号： H05K5/00

CPC分类号： G06F1/181

摘要： A computer enclosure includes a chassis (30), a side panel (10), a clip piece (25) and a button (21). The chassis includes an elastic tab (353) with a free end titled. The side panel is mounted on the chassis. The clip piece is attached to the side panel. The clip piece defines an opening (253) therein. The clip piece engages with the free end of the elastic tab for securing the side panel on the chassis. The button is disposed on the side panel. The button has a post (213) extending through the opening of the side panel for disengaging the elastic tab from the clip piece, thereby moving the side panel away from the chassis.

摘要翻译： 计算机外壳包括底盘（30），侧面板（10），夹子（25）和按钮（21）。 底盘包括具有自由端标题的弹性片（353）。 侧面板安装在机箱上。 夹片连接到侧面板上。 夹片在其中限定开口（253）。 夹片与弹性片的自由端接合，用于将侧板固定在底盘上。 按钮设置在侧面板上。 按钮具有延伸穿过侧板的开口的柱（213），用于使弹性突片与夹片分离，从而将侧板移离底盘。