公开(公告)号：US5581310A

公开(公告)日：1996-12-03

申请号：US378487

申请日：1995-01-26

申请人： Sanjay R. Vinekar ,  Lawrence A. Pearlstein ,  Michael A. Plotnick ,  Joseph E. Augenbraun

发明人： Sanjay R. Vinekar ,  Lawrence A. Pearlstein ,  Michael A. Plotnick ,  Joseph E. Augenbraun

IPC分类号： H04N5/44 ,  H04N5/907 ,  H04N7/26 ,  H04N7/50 ,  H04N9/64

CPC分类号： H04N5/4401 ,  H04N19/423 ,  H04N19/61 ,  H04N5/907 ,  H04N9/64

摘要： An architecture for a memory with a wide word, e.g. n-byte, width particularly suited for use as a high definition video frame store memory (80), and an accompanying organization for storing pixel data therein to facilitate efficient block and raster access therefrom. Specifically, the memory relies on storing n-byte wide words (n=(m.sub.1 .times.m.sub.2)) across m.sub.2 independent m.sub.1 -byte wide memory segments, with pre-defined positional offsets between respective m.sub.1 -byte words (203)("nibbles") stored in successive memory segments. All these segments are simultaneously accessed on a read or write basis. During a memory write operation, all the nibbles in an n-byte wide input word are appropriately shuffled to yield the proper inter-segment offsets prior to being written into the memory as a collective n-byte memory write word. During a read operation, all the nibbles read from memory in a collective n-byte memory read word are appropriately shuffled to yield an n-byte output word. Inasmuch as either a scan line or sub-block (210.sub.W, 210.sub.X, 210.sub.Y, 210.sub.Z) of a macroblock of pixel data is collectively written to or read from the memory during one memory write or read operation, with shuffling occurring on a pipelined basis therewith, each of these two widely differing forms of memory access can each occur at a very high efficiency and hence at essentially full memory bandwidth. This permits that memory to be fabricated from relatively inexpensive memory circuits.

摘要翻译： 用于具有宽字的存储器的架构，例如 特别适合用作高清晰度视频帧存储器（80）的n字节宽度，以及用于在其中存储像素数据的附属组织，以便于有效地对其进行块和光栅访问。 具体来说，存储器依赖于在m2个独立的m1字节的宽存储器段上存储n字节宽字（n =（m1×m2）），并且存储了存储在各个m1字节字（203）（“nibbles”）之间的预定位置偏移 在连续的内存段。 所有这些段都以读取或写入的方式同时访问。 在存储器写入操作期间，将n字节宽输入字中的所有半字节适当地进行混洗，以在作为集合的n字节存储器写入字写入存储器之前产生适当的段间偏移。 在读操作期间，在集合的n字节存储器读字中从存储器读取的所有半字节被适当地混洗以产生一个n字节的输出字。 由于像素数据的宏块的扫描线或子块（210W，210X，210Y，210Z）在一个存储器写入或读取操作期间被共同地写入存储器或从存储器中读取，因此以流水线为基础进行混洗 ，这两种广泛不同形式的存储器访问中的每一种可以以非常高的效率和因此基本上完整的存储器带宽发生。 这允许由相对便宜的存储器电路制造存储器。