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公开(公告)号：US5345239A
公开(公告)日：1994-09-06
申请号：US219825
申请日：1988-06-16
申请人： Asad M. Madni , Lawrence Wan
发明人： Asad M. Madni , Lawrence Wan
CPC分类号： G01S7/38 , H03D7/00 , H03D2200/0078 , H03D7/125 , H03D7/14 , H03D9/0658
摘要： A high-speed serrodyne digital frequency translator utilizes a digital phase-shifter, for example, of series coupled Schiffman type cells, which have reference and delay paths which are switched by three-terminal devices of the gallium arsenide FET type. No bias voltages are used and the FETS are driven by the output of a binary divider network which in turn is composed of GaAs FETS as active elements. Thus switching in the picosecond range results.
摘要翻译： 高速serrodyne数字频率转换器利用例如串联耦合的Schiffman型单元的数字移相器，其具有由砷化镓FET类型的三端子器件切换的参考和延迟路径。 没有使用偏置电压，FETs由二分频网络的输出驱动，二进制分频器网络又由GaAs FET作为有源元件组成。 因此，在皮秒范围内切换结果。
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公开(公告)号：US4649553A
公开(公告)日：1987-03-10
申请号：US717132
申请日：1985-03-26
申请人： Asad M. Madni , Lawrence Wan
发明人： Asad M. Madni , Lawrence Wan
摘要： An electronic phase shifter utilizes a serrodynable digital phase shifter which is driven by the output of a multi-bit counter. The counter in turn has its clock input driven by a pulse train which produces the desired frequency translation for noise and deception jamming. Alternatively, the counter has jam inputs for electronic antenna steering and electronic phase shift applications. In order to compensate for step phase error which causes undesirable spurious sidebands, the cells of the phase shifter are pretested for individual phase errors and an interface memory is provided which by use of a corrected counter code minimizes the errors.
摘要翻译： 电子移相器利用由多位计数器的输出驱动的可伺服数字移相器。 计数器依次具有由脉冲串驱动的时钟输入，其产生用于噪声和欺骗干扰的期望的频率转换。 或者，计数器具有用于电子天线转向和电子相移应用的阻塞输入。 为了补偿导致不期望的假边带的阶跃相位误差，移相器的单元被预先测试用于各个相位误差，并且提供了一个通过使用经校正的计数器代码使误差最小化的接口存储器。
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