摘要:
The present disclosure provides an integrating circuit and a signal processing module. The integrating circuit comprises an operational amplifier; an integrating capacitor, coupled to an output terminal and a first input terminal of the operational amplifier; and an adjustable resistance module, coupled between the first input terminal of the operational amplifier and an integrating input terminal of the integrating circuit. The adjustable resistance module receives a plurality of first control signals, to adjust a resistance value of the adjustable resistance module. The present disclosure may realize the noise brought by sidelobe to enhance the SNR, and reduce the power consumption and complexity of the overall circuit.
摘要:
Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.
摘要:
The present disclosure relates to a method for reducing second order intermodulation distortion in a harmonic rejection mixer arranged for down-converting a radio frequency signal to an in-phase and a quadrature baseband signal. The method includes adjusting an output current of a first mixer, to reduce the second order intermodulation distortion in the quadrature baseband signal to a first value, and adjusting an output current of a second mixer, to reduce the second order intermodulation distortion in the in-phase baseband signal to a second value.
摘要:
Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.
摘要:
Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.
摘要:
Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.
摘要:
A feedforward error-compensated receiver for minimizing undesired odd-order nonlinear distortion products. The receiver includes a first receiver path configured to receive an input signal. The first receiver path outputs a signal including at least one baseband (BB) frequency. At least one second receiver path is configured to receive the input signal and to provide a second receiver path output signal. The second receiver path includes at least one odd-order nonlinear distortion reference generator. The at least one odd-order nonlinear distortion reference generator and the mixer are configured to generate a synthetic odd-order nonlinear distortion signal. A combining element is configured to receive the output signal from the first path and the output signal from the second receiver path output and to combine the signals such that the odd-order nonlinear distortion signals are substantially attenuated at an output of the combining element.
摘要:
A compensating circuit for a mixer stage is provided, wherein the mixer stage has an input stage to which an input signal for mixing can be applied and has, following the input stage, a switching stage for mixing a differential input signal—obtained from the input stage as a function of the input signal—with an oscillator signal, wherein the input of the compensating circuit can be connected to an input signal terminal of the input stage and the output of the compensating circuit can be connected to an input signal terminal of the switching circuit at which the differential input signal obtained by means of the input stage is present, and wherein a compensating signal obtained by means of a compensating stage of the compensating circuit, in particular for compensating intermodulation products, can be produced by the compensating circuit at its output. The compensating circuit has a compensating input stage with means for influencing an amplitude and/or phase of the input signal, by which means the compensating stage can be supplied with a modified input signal.
摘要:
A technique includes providing a plurality of local oscillator signals such that each of the local oscillator signals has a different phase. The technique includes providing scaling units to scale the input signal pursuant to different scaling factors to generate scaled input signals. The scaling factors are selected on a periodic function of the phases. The technique also includes providing mixing circuits to mix the local oscillator signals with the scaled input signals to generate mixed signals and providing an adder to combine the mixed signals to generate an output signal.
摘要:
The invention relates to a mixer circuit 31 comprising a down-conversion mixing component 33 arranged for down-converting an input radio frequency signal Irf+, Irf−. In order to improve such a mixer circuit, it is proposed that it comprises in addition an active mixer load circuit 34 connected to output terminals of the mixing component. The active mixer load circuit includes an active mixer load 51, T1, T2 and modulating means S1-S4 arranged for modulating a flicker noise produced by the active mixer load away from the signal band of a signal Ibb+, Ibb− output by the down-conversion mixing component. The invention relates equally to a receiver, a chip and a device comprising such a mixer circuit and to a method for use with such a mixer circuit.