公开(公告)号：US08208113B2

公开(公告)日：2012-06-26

申请号：US12690324

申请日：2010-01-20

申请人： Chih-Chieh Wang ,  Yao-Hong Chien ,  Xin-Xin Lin ,  Li-Shan Chen ,  Xuan-Yu Liu

发明人： Chih-Chieh Wang ,  Yao-Hong Chien ,  Xin-Xin Lin ,  Li-Shan Chen ,  Xuan-Yu Liu

IPC分类号： G02F1/1343

CPC分类号： G02F1/1395 ,  G02F1/134336

摘要： A pixel structure including a substrate, a scan line, a data line, a common line, an active device, a pixel electrode, a passivation layer and a transition auxiliary electrode is provided. The scan line and the data line on the substrate intersect with each other to define a pixel region. The common line on the substrate is parallel to the scan line. The active device disposed within the pixel region is electrically connected to the scan line and the data line. The pixel electrode disposed within the pixel region is electrically connected to the active device. The passivation layer is between the data line and the pixel electrode. The transition auxiliary electrode is adjacent to the periphery of the pixel electrode and electrically connected to the common line through a contact hole of the passivation layer. The transition auxiliary electrode and the pixel electrode are made of the same film.

摘要翻译： 提供了包括衬底，扫描线，数据线，公共线，有源器件，像素电极，钝化层和过渡辅助电极的像素结构。 基板上的扫描线和数据线彼此相交以限定像素区域。 基板上的公共线与扫描线平行。 设置在像素区域内的有源器件电连接到扫描线和数据线。 设置在像素区域内的像素电极与有源器件电连接。 钝化层位于数据线和像素电极之间。 过渡辅助电极与像素电极的周边相邻，并通过钝化层的接触孔与公共线电连接。 过渡辅助电极和像素电极由相同的膜制成。

公开(公告)号：US20100304525A1

公开(公告)日：2010-12-02

申请号：US12854914

申请日：2010-08-12

申请人： Yao-Hong Chien ,  Chih-Chieh Wang ,  Xuan-Yu Liu ,  Li-Shan Chen

发明人： Yao-Hong Chien ,  Chih-Chieh Wang ,  Xuan-Yu Liu ,  Li-Shan Chen

IPC分类号： H01L21/8234

CPC分类号： H01L27/124 ,  G02F1/136213 ,  G02F1/136227 ,  G02F2201/40 ,  H01L27/1255

摘要： A fabricating method of a TFT array substrate includes following steps: providing a substrate having a pixel region and a bonding pad region surrounding the pixel region; forming a patterned polysilicon layer within the pixel region on the substrate; forming a first patterned insulating layer to cover the patterned polysilicon layer; forming a first patterned transparent conductive layer on the first patterned insulating layer; forming a first metal layer on the first patterned transparent conductive layer; forming a second patterned insulating layer to cover the first metal layer; forming a second patterned transparent conductive layer on the second patterned insulating layer; forming a second metal layer on the second patterned transparent conductive layer; forming a third patterned insulating layer to cover the second metal layer; and forming a third patterned transparent conductive layer on the third patterned insulating layer.

摘要翻译： TFT阵列基板的制造方法包括以下步骤：提供具有像素区域的基板和围绕像素区域的焊盘区域; 在所述衬底上的像素区域内形成图案化多晶硅层; 形成第一图案化绝缘层以覆盖图案化的多晶硅层; 在所述第一图案化绝缘层上形成第一图案化的透明导电层; 在第一图案化的透明导电层上形成第一金属层; 形成第二图案化绝缘层以覆盖所述第一金属层; 在所述第二图案化绝缘层上形成第二图案化透明导电层; 在所述第二图案化的透明导电层上形成第二金属层; 形成第三图案化绝缘层以覆盖所述第二金属层; 以及在所述第三图案化绝缘层上形成第三图案化透明导电层。

公开(公告)号：US07968367B2

公开(公告)日：2011-06-28

申请号：US12854914

申请日：2010-08-12

申请人： Yao-Hong Chien ,  Chih-Chieh Wang ,  Xuan-Yu Liu ,  Li-Shan Chen

发明人： Yao-Hong Chien ,  Chih-Chieh Wang ,  Xuan-Yu Liu ,  Li-Shan Chen

IPC分类号： H01L21/00 ,  H01L21/84 ,  H01L21/8238

CPC分类号： H01L27/124 ,  G02F1/136213 ,  G02F1/136227 ,  G02F2201/40 ,  H01L27/1255

摘要： A fabricating method of a TFT array substrate includes following steps: providing a substrate having a pixel region and a bonding pad region surrounding the pixel region; forming a patterned polysilicon layer within the pixel region on the substrate; forming a first patterned insulating layer to cover the patterned polysilicon layer; forming a first patterned transparent conductive layer on the first patterned insulating layer; forming a first metal layer on the first patterned transparent conductive layer; forming a second patterned insulating layer to cover the first metal layer; forming a second patterned transparent conductive layer on the second patterned insulating layer; forming a second metal layer on the second patterned transparent conductive layer; forming a third patterned insulating layer to cover the second metal layer; and forming a third patterned transparent conductive layer on the third patterned insulating layer.

摘要翻译： TFT阵列基板的制造方法包括以下步骤：提供具有像素区域的基板和围绕像素区域的焊盘区域; 在所述衬底上的像素区域内形成图案化多晶硅层; 形成第一图案化绝缘层以覆盖图案化的多晶硅层; 在所述第一图案化绝缘层上形成第一图案化的透明导电层; 在第一图案化的透明导电层上形成第一金属层; 形成第二图案化绝缘层以覆盖所述第一金属层; 在所述第二图案化绝缘层上形成第二图案化透明导电层; 在所述第二图案化的透明导电层上形成第二金属层; 形成第三图案化绝缘层以覆盖所述第二金属层; 以及在所述第三图案化绝缘层上形成第三图案化透明导电层。

公开(公告)号：US07812352B2

公开(公告)日：2010-10-12

申请号：US12396492

申请日：2009-03-03

申请人： Yao-Hong Chien ,  Chih-Chieh Wang ,  Xuan-Yu Liu ,  Li-Shan Chen

发明人： Yao-Hong Chien ,  Chih-Chieh Wang ,  Xuan-Yu Liu ,  Li-Shan Chen

IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L31/20 ,  H01L31/062 ,  H01L27/01

CPC分类号： H01L27/124 ,  G02F1/136213 ,  G02F1/136227 ,  G02F2201/40 ,  H01L27/1255

摘要： A TFT array substrate is disclosed. In the pixel structure of the TFT array substrate, patterned transparent conductive layers are disposed under a first metal layer (M1) and a second metal layer (M2) and most areas of the M1 and M2 are substituted by the patterned transparent conductive layers. So, the pixel structure has high aperture ratio and large storage capacitance. Besides, a scan bonding pad on the TFT array substrate includes a first patterned transparent conductive layer (T1), the M1 and a third patterned transparent conductive layer (T3). The M1 is disposed on the T1, and the T3 is electrically connected to the T1 via a contact hole in the M1. So, the contact resistance of the scan bonding pad is small. The data bonding pad on the TFT array substrate has similar design. Moreover, fabricating methods of TFT array substrates are also provided.

摘要翻译： 公开了TFT阵列基板。 在TFT阵列基板的像素结构中，图案化的透明导电层设置在第一金属层（M1）和第二金属层（M2）的下方，M1和M2的大部分区域被图案化的透明导电层所取代。 因此，像素结构具有高开口率和大的存储电容。 此外，TFT阵列基板上的扫描焊盘包括第一图案化透明导电层（T1），M1和第三图案化透明导电层（T3）。 M1设置在T1上，T3通过M1中的接触孔与T1电连接。 因此，扫描焊盘的接触电阻很小。 TFT阵列基板上的数据接合焊盘具有相似的设计。 此外，还提供了TFT阵列基板的制造方法。

公开(公告)号：US20100118251A1

公开(公告)日：2010-05-13

申请号：US12690324

申请日：2010-01-20

申请人： CHIH-CHIEH WANG ,  Yao-Hong Chien ,  Xin-Xin Lin ,  Li-Shan Chen ,  Xuan-Yu Liu

发明人： CHIH-CHIEH WANG ,  Yao-Hong Chien ,  Xin-Xin Lin ,  Li-Shan Chen ,  Xuan-Yu Liu

IPC分类号： G02F1/1343

CPC分类号： G02F1/1395 ,  G02F1/134336

摘要： A pixel structure including a substrate, a scan line, a data line, a common line, an active device, a pixel electrode, a passivation layer and a transition auxiliary electrode is provided. The scan line and the data line on the substrate intersect with each other to define a pixel region. The common line on the substrate is parallel to the scan line. The active device disposed within the pixel region is electrically connected to the scan line and the data line. The pixel electrode disposed within the pixel region is electrically connected to the active device. The passivation layer is between the data line and the pixel electrode. The transition auxiliary electrode is adjacent to the periphery of the pixel electrode and electrically connected to the common line through a contact hole of the passivation layer. The transition auxiliary electrode and the pixel electrode are made of the same film.

摘要翻译： 提供了包括衬底，扫描线，数据线，公共线，有源器件，像素电极，钝化层和过渡辅助电极的像素结构。 扫描线和在基板上的数据线彼此交叉以限定像素区域。 在衬底上的公共线是平行于所述扫描线。 设置在像素区域内的有源元件被电连接到扫描线和数据线。 设置在像素区域内的像素电极与有源器件电连接。 钝化层位于数据线和像素电极之间。 过渡辅助电极与像素电极的周边相邻，并通过钝化层的接触孔与公共线电连接。 过渡辅助电极和像素电极由相同的膜制成。

公开(公告)号：US20080278646A1

公开(公告)日：2008-11-13

申请号：US12054396

申请日：2008-03-25

申请人： Yao-Hong Chien ,  Chih-Chieh Wang ,  Szu-Fen Chen ,  Jung-Chieh Cheng ,  Li-Shan Chen

发明人： Yao-Hong Chien ,  Chih-Chieh Wang ,  Szu-Fen Chen ,  Jung-Chieh Cheng ,  Li-Shan Chen

IPC分类号： G02F1/136

CPC分类号： G02F1/136213 ,  G02F1/1395

摘要： A pixel including a transistor, a liquid crystal capacitor, a storage capacitor and a coupling capacitor is provided. The first end of the transistor is connected to a data line, the liquid crystal capacitor and the storage capacitor are coupled between the second end of the transistor and a common voltage, and the coupling capacitor is connected between the second end of the transistor and a select line. After a driving voltage is outputted to the liquid crystal capacitor and the storage capacitor by the data line, the select line inputs a pulse signal to the liquid crystal capacitor through the coupling capacitor. The pulse signal is capable of increasing the ability of the electric field for driving the liquid crystal so that the liquid crystal can still display normally in the bend state even though the lowest pixel voltage is lower than the critical voltage.

摘要翻译： 提供了包括晶体管，液晶电容器，存储电容器和耦合电容器的像素。 晶体管的第一端连接到数据线，液晶电容器和存储电容器耦合在晶体管的第二端和公共电压之间，耦合电容器连接在晶体管的第二端和 选择行。 在通过数据线将驱动电压输出到液晶电容器和存储电容器之后，选择线通过耦合电容器向液晶电容器输入脉冲信号。 脉冲信号能够提高用于驱动液晶的电场的能力，使得即使最低像素电压低于临界电压，液晶仍然能够在弯曲状态下正常显示。

公开(公告)号：US07684000B2

公开(公告)日：2010-03-23

申请号：US11608379

申请日：2006-12-08

申请人： Chih-Chieh Wang ,  Yao-Hong Chien ,  Xin-Xin Lin ,  Li-Shan Chen ,  Xuan-Yu Liu

发明人： Chih-Chieh Wang ,  Yao-Hong Chien ,  Xin-Xin Lin ,  Li-Shan Chen ,  Xuan-Yu Liu

IPC分类号： G02F1/1343

CPC分类号： G02F1/1395 ,  G02F1/134336

摘要： A pixel structure including a substrate, a scan line, a data line, a common line, an active device, a pixel electrode, a passivation layer and a transition auxiliary electrode is provided. The scan line and the data line on the substrate intersect with each other to define a pixel region. The common line on the substrate is parallel to the scan line. The active device disposed within the pixel region is electrically connected to the scan line and the data line. The pixel electrode disposed within the pixel region is electrically connected to the active device. The passivation layer is between the data line and the pixel electrode. The transition auxiliary electrode is adjacent to the periphery of the pixel electrode and electrically connected to the common line through a contact hole of the passivation layer. The transition auxiliary electrode and the pixel electrode are made of the same film.

摘要翻译： 提供了包括衬底，扫描线，数据线，公共线，有源器件，像素电极，钝化层和过渡辅助电极的像素结构。 基板上的扫描线和数据线彼此相交以限定像素区域。 基板上的公共线与扫描线平行。 设置在像素区域内的有源器件电连接到扫描线和数据线。 设置在像素区域内的像素电极与有源器件电连接。 钝化层位于数据线和像素电极之间。 过渡辅助电极与像素电极的周边相邻，并通过钝化层的接触孔与公共线电连接。 过渡辅助电极和像素电极由相同的膜制成。

公开(公告)号：US20100001286A1

公开(公告)日：2010-01-07

申请号：US12396492

申请日：2009-03-03

申请人： Yao-Hong Chien ,  Chih-Chieh Wang ,  Xuan-Yu Liu ,  Li-Shan Chen

发明人： Yao-Hong Chien ,  Chih-Chieh Wang ,  Xuan-Yu Liu ,  Li-Shan Chen

IPC分类号： H01L31/036 ,  H01L21/70

CPC分类号： H01L27/124 ,  G02F1/136213 ,  G02F1/136227 ,  G02F2201/40 ,  H01L27/1255

摘要： A TFT array substrate is disclosed. In the pixel structure of the TFT array substrate, patterned transparent conductive layers are disposed under a first metal layer (M1) and a second metal layer (M2) and most areas of the M1 and M2 are substituted by the patterned transparent conductive layers. So, the pixel structure has high aperture ratio and large storage capacitance. Besides, a scan bonding pad on the TFT array substrate includes a first patterned transparent conductive layer (T1), the M1 and a third patterned transparent conductive layer (T3). The M1 is disposed on the T1, and the T3 is electrically connected to the T1 via a contact hole in the M1. So, the contact resistance of the scan bonding pad is small. The data bonding pad on the TFT array substrate has similar design. Moreover, fabricating methods of TFT array substrates are also provided.

摘要翻译： 公开了TFT阵列基板。 在TFT阵列基板的像素结构中，图案化的透明导电层设置在第一金属层（M1）和第二金属层（M2）的下方，M1和M2的大部分区域被图案化的透明导电层所取代。 因此，像素结构具有高开口率和大的存储电容。 此外，TFT阵列基板上的扫描焊盘包括第一图案化透明导电层（T1），M1和第三图案化透明导电层（T3）。 M1设置在T1上，T3通过M1中的接触孔与T1电连接。 因此，扫描焊盘的接触电阻很小。 TFT阵列基板上的数据接合焊盘具有相似的设计。 此外，还提供了TFT阵列基板的制造方法。

公开(公告)号：US20080084529A1

公开(公告)日：2008-04-10

申请号：US11608379

申请日：2006-12-08

申请人： Chih-Chieh Wang ,  Yao-Hong Chien ,  Xin-Xin Lin ,  Li-Shan Chen ,  Xuan-Yu Liu

发明人： Chih-Chieh Wang ,  Yao-Hong Chien ,  Xin-Xin Lin ,  Li-Shan Chen ,  Xuan-Yu Liu

IPC分类号： G02F1/1343

CPC分类号： G02F1/1395 ,  G02F1/134336

摘要： A pixel structure including a substrate, a scan line, a data line, a common line, an active device, a pixel electrode, a passivation layer and a transition auxiliary electrode is provided. The scan line and the data line on the substrate intersect with each other to define a pixel region. The common line on the substrate is parallel to the scan line. The active device disposed within the pixel region is electrically connected to the scan line and the data line. The pixel electrode disposed within the pixel region is electrically connected to the active device. The passivation layer is between the data line and the pixel electrode. The transition auxiliary electrode is adjacent to the periphery of the pixel electrode and electrically connected to the common line through a contact hole of the passivation layer. The transition auxiliary electrode and the pixel electrode are made of the same film.

摘要翻译： 提供了包括衬底，扫描线，数据线，公共线，有源器件，像素电极，钝化层和过渡辅助电极的像素结构。 基板上的扫描线和数据线彼此相交以限定像素区域。 基板上的公共线与扫描线平行。 设置在像素区域内的有源器件电连接到扫描线和数据线。 设置在像素区域内的像素电极与有源器件电连接。 钝化层位于数据线和像素电极之间。 过渡辅助电极与像素电极的周边相邻，并通过钝化层的接触孔与公共线电连接。 过渡辅助电极和像素电极由相同的膜制成。