公开(公告)号：US20130015510A1

公开(公告)日：2013-01-17

申请号：US13509998

申请日：2011-08-09

Applicant: Jiang Yan ,  Lichuan Zhao

Inventor： Jiang Yan ,  Lichuan Zhao

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L21/76897 ,  H01L29/456 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6656

Abstract: The invention provides a transistor, a semiconductor device and a method for manufacturing the same. The method for manufacturing a transistor comprises: defining an active area on a semiconductor substrate, forming a dummy gate stack on the active area, primary spacers surrounding said dummy gate stack, and an insulating layer surrounding said primary spacers, and forming source/drain regions embedded in said active area; removing the dummy gate in said dummy gate stack to form a first recessed portion surrounded by the primary spacers; filling Cu simultaneously in said first recessed portion and in the source/drain contact holes penetrating said insulating layer to form a gate and source/drain contacts. By filling the gate and the source/drain contact holes with the metal Cu simultaneously in the Gate Last structure, the gate serial resistance and the source/drain contact holes resistance in the Gate Last process are decreased. Besides, the effect of metal filling is improved in small scale, and the process complexity and difficulty is efficiently decreased.

Abstract translation: 本发明提供一种晶体管，半导体器件及其制造方法。 晶体管的制造方法包括：在半导体衬底上限定有源区，在有源区上形成虚拟栅极叠层，围绕所述伪栅极堆叠的主要间隔区以及围绕所述主隔板的绝缘层，以及形成源极/漏极区域 嵌入所述活动区域; 去除所述虚拟栅极堆叠中的虚拟栅极以形成由所述主隔板包围的第一凹陷部分; 在所述第一凹部和穿过所述绝缘层的源极/漏极接触孔中同时填充Cu以形成栅极和源极/漏极接触。 通过在Gate Last结构中同时用金属Cu填充栅极和源极/漏极接触孔，栅极末端工艺中的栅极串联电阻和源极/漏极接触孔电阻降低。 此外，小规模改善了金属填充的效果，有效降低了工艺的复杂性和难度。

公开(公告)号：US20130221535A1

公开(公告)日：2013-08-29

申请号：US13517050

申请日：2012-02-29

Applicant: Xiaolong Ma ,  Huaxiang Yin ,  Lichuan Zhao

Inventor： Xiaolong Ma ,  Huaxiang Yin ,  Lichuan Zhao

IPC: H01L23/48 ,  B32B9/00 ,  H01L21/768

CPC classification number: H01L23/528 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  Y10T428/30 ,  H01L2924/00

Abstract: A diffusion barrier layer, a metal interconnect arrangement and a method of manufacturing the same are disclosed. In one embodiment, the metal interconnect arrangement may comprise a conductive plug/interconnect wire for electrical connection, and a diffusion barrier layer provided on at least a portion of a surface of the conductive plug/interconnect wire. The diffusion barrier layer may comprise insulating amorphous carbon.

Abstract translation: 公开了一种扩散阻挡层，金属互连装置及其制造方法。 在一个实施例中，金属互连装置可以包括用于电连接的导电插头/互连线，以及设置在导电插头/互连线的表面的至少一部分上的扩散阻挡层。 扩散阻挡层可以包括绝缘无定形碳。