INTEGRATED PHASE-SHIFTING-AND-COMBINING CIRCUITRY TO SUPPORT MULTIPLE ANTENNAS
    1.
    发明申请
    INTEGRATED PHASE-SHIFTING-AND-COMBINING CIRCUITRY TO SUPPORT MULTIPLE ANTENNAS 有权
    集成相移和组合电路支持多个天线

    公开(公告)号:US20130241772A1

    公开(公告)日:2013-09-19

    申请号:US13988047

    申请日:2011-10-31

    IPC分类号: H01Q3/26

    摘要: The disclosed embodiments generally relate to techniques for processing signals received from multiple antennas. More specifically, the disclosed embodiments relate to a system that uses an integrated phase-shifting-and-combining circuit to process signals received from multiple antenna elements. This circuit applies a specified phase shift to the input signals, and combines the phase-shifted input signals to produce an output signal. In some embodiments, the integrated phase-shifting-and-combining circuit uses a current-steering mechanism to perform the phase-shifting-and-combining operations. This current-steering mechanism operates by converting the input signals into associated currents, and then steering each of the associated currents through multiple pathways which have different delays. Next, the currents from the multiple pathways for the associated currents are combined to produce the output signal. During this process, while steering each of the associated currents through multiple pathways to achieve different phase shifts, complementary impedance changes through the multiple pathways cause the aggregate impedance at the output to remain substantially constant.

    摘要翻译: 所公开的实施例通常涉及用于处理从多个天线接收的信号的技术。 更具体地,所公开的实施例涉及使用集成的相移和组合电路来处理从多个天线元件接收的信号的系统。 该电路对输入信号施加规定的相移,并组合移相输入信号以产生输出信号。 在一些实施例中,集成的相移和组合电路使用电流导引机构来执行相移和组合操作。 该电流导向机构通过将输入信号转换为相关联的电流来操作,然后通过具有不同延迟的多个路径来引导每个相关联的电流。 接下来,来自相关电流的多路径的电流被组合以产生输出信号。 在该过程中,当通过多个通路来转向每个相关联的电流以实现不同的相移时,通过多个通路的互补阻抗变化导致输出端的总阻抗保持基本恒定。

    Integrated phase-shifting-and-combining circuitry to support multiple antennas
    2.
    发明授权
    Integrated phase-shifting-and-combining circuitry to support multiple antennas 有权
    集成的相移和组合电路支持多个天线

    公开(公告)号:US09425505B2

    公开(公告)日:2016-08-23

    申请号:US13988047

    申请日:2011-10-31

    IPC分类号: H01Q3/22 H01Q3/26 H04B7/08

    摘要: The disclosed embodiments generally relate to techniques for processing signals received from multiple antennas. More specifically, the disclosed embodiments relate to a system that uses an integrated phase-shifting-and-combining circuit to process signals received from multiple antenna elements. This circuit applies a specified phase shift to the input signals, and combines the phase-shifted input signals to produce an output signal. In some embodiments, the integrated phase-shifting-and-combining circuit uses a current-steering mechanism to perform the phase-shifting-and-combining operations. This current-steering mechanism operates by converting the input signals into associated currents, and then steering each of the associated currents through multiple pathways which have different delays. Next, the currents from the multiple pathways for the associated currents are combined to produce the output signal. During this process, while steering each of the associated currents through multiple pathways to achieve different phase shifts, complementary impedance changes through the multiple pathways cause the aggregate impedance at the output to remain substantially constant.

    摘要翻译: 所公开的实施例通常涉及用于处理从多个天线接收的信号的技术。 更具体地,所公开的实施例涉及使用集成的相移和组合电路来处理从多个天线元件接收的信号的系统。 该电路对输入信号施加规定的相移,并组合移相输入信号以产生输出信号。 在一些实施例中,集成的相移和组合电路使用电流导引机构来执行相移和组合操作。 该电流导向机构通过将输入信号转换为相关联的电流来操作,然后通过具有不同延迟的多个路径来引导每个相关联的电流。 接下来,来自相关电流的多路径的电流被组合以产生输出信号。 在该过程中,当通过多个通路来引导每个相关联的电流以实现不同的相移时,通过多个通路的互补阻抗变化导致输出端的总阻抗保持基本恒定。

    Finite input response filter in a voltage-mode driver
    3.
    发明授权
    Finite input response filter in a voltage-mode driver 有权
    电压模式驱动器中的有限输入响应滤波器

    公开(公告)号:US08593217B1

    公开(公告)日:2013-11-26

    申请号:US13411446

    申请日:2012-03-02

    申请人: Lingkai Kong

    发明人: Lingkai Kong

    IPC分类号: H03K5/00

    摘要: A FIR filter component for a voltage mode driver includes a first node, a second node, and a first switching component comprising a first transistor having a first drain/source, a gate, and a second drain/source, and also a second transistor having a first drain/source, a gate, and a second drain/source. The FIR filter component also includes a first tunable resistor coupled between the first node and a first potential, and a second tunable resistor coupled between the second node and a second potential, wherein the FIR filter component is configured to generate a first output signal at the first output node.

    摘要翻译: 用于电压模式驱动器的FIR滤波器组件包括第一节点,第二节点和包括具有第一漏极/源极,栅极和第二漏极/源极的第一晶体管的第一开关部件,以及具有第 第一漏极/源极,栅极和第二漏极/源极。 FIR滤波器组件还包括耦合在第一节点和第一电位之间的第一可调电阻器和耦合在第二节点和第二电位之间的第二可调电阻器,其中FIR滤波器组件被配置为在 第一个输出节点。