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公开(公告)号:US3748386A
公开(公告)日:1973-07-24
申请号:US3748386D
申请日:1972-04-03
IPC分类号: H04N5/93 , G11B20/02 , H03K5/007 , H04N5/16 , H04N5/18 , H04N5/92 , H04N5/931 , H04N5/95 , H04N5/953 , H04N5/04
摘要: A time-base error correction system for a video signal employing a plurality of serially connected delay lines. Circuit means are conditioned to detect the closest timing match between a reference synchronizing signal and the video signal as it appears at various points along the delay path and to connect the appropriate delay line point or junction to an output at which the correctly delayed video signal appears. Featured circuitry provides for eliminating the erroneous leading edge of a video synchronizing pulse distorted by changes in the selected delay point and for compensating for variations in d.c. offset of the video signal introduced by differential delay line path effects.
摘要翻译: 一种采用多个串行连接的延迟线的视频信号的时基误差校正系统。 电路装置被调节为检测参考同步信号和视频信号之间最接近的定时匹配,因为它在沿着延迟路径的不同点处出现,并且将适当的延迟线点或结点连接到出现正确延迟的视频信号的输出端 。 特色电路提供消除视频同步脉冲的错误前沿,通过所选延迟点的变化而变形,并补偿直流电流的变化。 通过差分延迟线路路径效应引入的视频信号的偏移。