公开(公告)号：US06694423B1

公开(公告)日：2004-02-17

申请号：US09320336

申请日：1999-05-26

申请人： Balraj Singh ,  Manuel O. Gautho ,  Venkat Mattela

发明人： Balraj Singh ,  Manuel O. Gautho ,  Venkat Mattela

IPC分类号： G06F934

CPC分类号： G06F9/3814 ,  G06F9/3802 ,  G06F9/3816 ,  G06F12/04 ,  G06F12/0886

摘要： A data processing unit having superscalar structure able to execute a plurality of instructions in parallel includes a memory for storing the instructions having a plurality of n-bit input/output ports, an instruction fetch unit, a coupling unit for coupling said memory with the instruction fetch unit, and an instruction stream request control unit for addressing the mmory to provide an instruction stream at its output ports. The coupling unit includes a shifter having an input and an output and a control input, the input being coupled with the output ports of the memory, the output being coupled with the instruction fetch unit, and the control input being coupled with the instruction stream request control unit. The instruction fetch unit has a register for storing said instruction stream and a shifter to shift the content of the register.

摘要翻译： 具有能够并行执行多个指令的超标量结构的数据处理单元包括用于存储具有多个n位输入/输出端口的指令的存储器，指令提取单元，用于将所述存储器与指令耦合的耦合单元 提取单元，以及指令流请求控制单元，用于寻址该输出端以在其输出端口提供指令流。 耦合单元包括具有输入和输出和控制输入的移位器，输入端与存储器的输出端口耦合，输出与指令提取单元耦合，控制输入与指令流请求相结合 控制单元 指令提取单元具有用于存储所述指令流的寄存器和用于移位寄存器的内容的移位器。

公开(公告)号：US06223272B1

公开(公告)日：2001-04-24

申请号：US09116062

申请日：1998-07-15

申请人： Paul R. Coehlo ,  Manuel O. Gautho ,  Yeh-Chen Fu

发明人： Paul R. Coehlo ,  Manuel O. Gautho ,  Yeh-Chen Fu

IPC分类号： G06F1100

CPC分类号： G06F11/261 ,  G01R31/318357 ,  G06F17/5022

摘要： The present invention relates to a verification system for verifying whether vector outputs from a software simulator match the vector outputs from a hardware emulator by comparing a pair of checksums. A first checksum value is calculated from the output vectors obtained from the software simulator and a second checksum is calculated from the output vectors obtained from the hardware emulator. Accordingly, only a checksum value is required to be downloaded or uploaded, thereby eliminating the need to upload or download large numbers of output vectors. The system includes a software simulator for generating a set of input and output vectors, a checksum calculator for calculating the checksum of the output vector generated by the software simulator, a hardware emulator for receiving and storing the vector inputs and the checksum value generated by the software simulator and for generating output vectors based on the downloaded input vectors, a checksum calculator for calculating the checksum of the vector outputs generated by the hardware emulator and a checksum comparator for comparing the checksums.

摘要翻译： 本发明涉及一种验证系统，用于通过比较一对校验和来验证来自软件模拟器的矢量输出是否与硬件仿真器的矢量输出相匹配。 从从软件模拟器获得的输出向量计算第一个校验和值，并且从从硬件仿真器获得的输出向量计算第二校验和。 因此，仅需要下载或上传校验和值，从而不需要上传或下载大量的输出向量。 该系统包括用于生成一组输入和输出向量的软件模拟器，用于计算由软件模拟器产生的输出向量的校验和的校验和计算器，用于接收和存储向量输入的硬件仿真器以及由 软件模拟器和用于基于下载的输入向量产生输出向量的校验和计算器，用于计算由硬件仿真器产生的矢量输出的校验和和用于比较校验和的校验和比较器。