In-process system level test before surface mount
    1.
    发明申请
    In-process system level test before surface mount 有权
    表面贴装前的进程内系统级测试

    公开(公告)号:US20080001618A1

    公开(公告)日:2008-01-03

    申请号:US11900615

    申请日:2007-09-11

    CPC classification number: G01R31/01 G01R31/2894

    Abstract: Methods and systems for testing an integrated circuit during an assembly process are described. The integrated circuit is received from inventory. The integrated circuit is placed in a socket on a first circuit board for system-level testing. The system-level testing is performed prior to placement and permanent attachment of the integrated circuit onto a second circuit board. Provided the integrated circuit passes the system-level testing, the placement and permanent attachment of the integrated circuit to the second circuit board is the next step following the system-level testing in the assembly process.

    Abstract translation: 描述了在组装过程中测试集成电路的方法和系统。 从库存中收集集成电路。 集成电路放置在第一电路板的插座中,用于系统级测试。 在将集成电路放置并永久地附着到第二电路板之前执行系统级测试。 如果集成电路通过系统级测试,集成电路到第二电路板的放置和永久性连接是组装过程中系统级测试之后的下一步。

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