Combined encoder/syndrome generator with reduced delay
    1.
    发明授权
    Combined encoder/syndrome generator with reduced delay 有权
    具有减少延迟的组合式编码器/综合发生器

    公开(公告)号:US07743311B2

    公开(公告)日:2010-06-22

    申请号:US11341230

    申请日:2006-01-26

    IPC分类号: H03M13/00

    CPC分类号: G11B20/1833 H03M13/158

    摘要: A combined encoder/syndrome generator is provided that has a reduced delay. The combined encoder/syndrome generator generates check symbols during an encoding process and error syndromes during a decoding process. The combined encoder/syndrome generator has two or more blocks. The output of each block is fed as an input into a subsequent block. Each block can perform computations in parallel to reduce the delay of the encoding system.

    摘要翻译: 提供了具有减少的延迟的组合编码器/校正子发生器。 组合的编码器/校正子发生器在解码过程期间在编码处理期间产生校验符号和错误综合征。 组合的编码器/校正子发生器具有两个或更多个块。 每个块的输出作为输入被馈送到随后的块中。 每个块可以并行执行计算,以减少编码系统的延迟。

    Decoding error correction codes using a modular single recursion implementation
    2.
    发明授权
    Decoding error correction codes using a modular single recursion implementation 有权
    使用模块化单递归实现解码纠错码

    公开(公告)号:US07467346B2

    公开(公告)日:2008-12-16

    申请号:US11207474

    申请日:2005-08-18

    IPC分类号: H03M13/00

    CPC分类号: H03M13/1525 H03M13/1515

    摘要: Systems and methods are provided for performing error correction decoding. The coefficients of the error locator polynomial are iteratively determined for each codeword using a modular implementation of a single recursion key-equation solver algorithm. According to this implementation, a plurality of modules are used to calculate the current and previous coefficients of the error locator polynomial. One module is used for each correctable error. The modular single recursion implementation is programmable, because the number of modules can be easily changed to correct any number of correctable errors. Galois field tower arithmetic can be used to calculate the inverse of an error term. Galois field tower arithmetic greatly reduces the size of the inversion unit. The latency time can be reduced by placing the computations of the inverse error term outside the critical path of the error locator polynomial algorithm.

    摘要翻译: 提供了用于执行纠错解码的系统和方法。 使用单个递归密钥方程求解算法的模块化实现,针对每个码字迭代确定误差定位多项式的系数。 根据该实现,使用多个模块来计算误差定位多项式的当前系数和先前系数。 一个模块用于每个可纠正的错误。 模块化单递归实现是可编程的,因为可以轻松更改模块数量以更正任何数量的可纠正错误。 伽罗瓦域塔算术可用于计算误差项的倒数。 伽罗瓦域塔算术大大减小了反演单元的大小。 通过将反向误差项的计算置于误差定位多项式算法的关键路径之外,可以减少延迟时间。

    Combined encoder/syndrome generator with reduced delay
    3.
    发明申请
    Combined encoder/syndrome generator with reduced delay 有权
    具有减少延迟的组合式编码器/综合发生器

    公开(公告)号:US20070192669A1

    公开(公告)日:2007-08-16

    申请号:US11341230

    申请日:2006-01-26

    IPC分类号: H03M13/00

    CPC分类号: G11B20/1833 H03M13/158

    摘要: A combined encoder/syndrome generator is provided that has a reduced delay. The combined encoder/syndrome generator generates check symbols during an encoding process and error syndromes during a decoding process. The combined encoder/syndrome generator has two or more blocks. The output of each block is fed as an input into a subsequent block. Each block can perform computations in parallel to reduce the delay of the encoding system.

    摘要翻译: 提供了具有减少的延迟的组合编码器/校正子发生器。 组合的编码器/校正子发生器在解码过程期间在编码处理期间产生校验符号和错误综合征。 组合的编码器/校正子发生器具有两个或更多个块。 每个块的输出作为输入被馈送到随后的块中。 每个块可以并行执行计算,以减少编码系统的延迟。

    Techniques for detecting and correcting errors using multiple interleave erasure pointers
    4.
    发明申请
    Techniques for detecting and correcting errors using multiple interleave erasure pointers 失效
    使用多个交错擦除指针检测和纠正错误的技术

    公开(公告)号:US20050229069A1

    公开(公告)日:2005-10-13

    申请号:US10817421

    申请日:2004-04-02

    摘要: Techniques for detecting and correcting burst errors in data bytes formed in a two-level block code structure. A second level decoder uses block level check bytes to detect columns in a two-level block code structure that contain error bytes. The second level decoder generates erasure pointers that identify columns in the two-level block structure effected by burst errors. A first level decoder then uses codeword check bytes to correct all of the bytes in the columns identified by the erasure pointers. The first level decoder is freed to use all of the codeword check bytes only for error byte value calculations. The first level decoder does not need to use any of the codeword check bytes for error location calculations, because the erasure pointers generated by the second level decoder provide all of the necessary error locations. This techniques doubles the error correction capability of the first level decoder.

    摘要翻译: 用于检测和校正在两级块代码结构中形成的数据字节中的突发错误的技术。 第二级解码器使用块级检查字节来检测包含错误字节的两级块代码结构中的列。 第二级解码器产生擦除指针,其识别由突发错误影响的两级块结构中的列。 然后,第一级解码器使用码字校验字节来校正由擦除指针识别的列中的所有字节。 第一级解码器被释放以仅使用所有码字校验字节来进行错误字节值计算。 第一级解码器不需要使用任何码字校验字节进行错误位置计算,因为由第二级解码器产生的擦除指针提供所有必要的错误位置。 这种技术使第一级解码器的纠错能力加倍。

    Techniques for correcting errors and erasures using a single-shot generalized minimum distance key equation solver
    6.
    发明申请
    Techniques for correcting errors and erasures using a single-shot generalized minimum distance key equation solver 有权
    使用单次广义最小距离密钥方程求解器纠正错误和擦除的技术

    公开(公告)号:US20090254796A1

    公开(公告)日:2009-10-08

    申请号:US12099532

    申请日:2008-04-08

    IPC分类号: H03M13/00

    摘要: A system corrects errors in a codeword. The system includes a channel that sorts reliability numbers of symbols in the codeword to create an ordered list of candidate erasure locations. The system also includes a generalized minimum distance decoder that iteratively processes the ordered list of candidate erasure locations and at least two syndromes of the codeword using a single-shot key equation solver to generate an error locator polynomial and an error evaluator polynomial. The generalized minimum distance decoder processes the least reliable candidate erasure locations first within the ordered list of candidate erasure locations.

    摘要翻译: 系统校正码字中的错误。 该系统包括对码字中的符号的可靠性数量进行排序以创建候选擦除位置的有序列表的信道。 该系统还包括广义最小距离解码器,其使用单次密钥方程求解器迭代地处理候选擦除位置的有序列表和码字的至少两个校验子,以生成错误定位器多项式和误差评估器多项式。 广义最小距离解码器首先在候选擦除位置的有序列表中处理最不可靠的候选擦除位置。

    Decoding Error Correction Codes Using A Modular Single Recursion Implementation
    7.
    发明申请
    Decoding Error Correction Codes Using A Modular Single Recursion Implementation 有权
    使用模块化单递归执行解码纠错码

    公开(公告)号:US20090063938A1

    公开(公告)日:2009-03-05

    申请号:US12270737

    申请日:2008-11-13

    IPC分类号: H03M13/07 G06F11/10

    CPC分类号: H03M13/1525 H03M13/1515

    摘要: Systems and methods are provided for performing error correction decoding. The coefficients of the error locator polynomial are iteratively determined for each codeword using a modular implementation of a single recursion key-equation solver algorithm. According to this implementation, modules are used to calculate the current and previous coefficients of the error locator polynomial. One module is used for each correctable error. The modular single recursion implementation is programmable, because the number of modules can be easily changed to correct any number of correctable errors. Galois field tower arithmetic can be used to calculate the inverse of an error term. Galois field tower arithmetic greatly reduces the size of the inversion unit. The latency time can be reduced by placing the computations of the inverse error term outside the critical path of the error locator polynomial algorithm.

    摘要翻译: 提供了用于执行纠错解码的系统和方法。 使用单个递归密钥方程求解算法的模块化实现,针对每个码字迭代确定误差定位多项式的系数。 根据该实现,使用模块来计算误差定位器多项式的当前系数和先前系数。 一个模块用于每个可纠正的错误。 模块化单递归实现是可编程的,因为可以轻松更改模块数量以更正任何数量的可纠正错误。 伽罗瓦域塔算术可用于计算误差项的倒数。 伽罗瓦域塔算术大大减小了反演单元的大小。 通过将反向误差项的计算置于误差定位多项式算法的关键路径之外,可以减少延迟时间。

    Decoding error correction codes using a modular single recursion implementation
    8.
    发明申请
    Decoding error correction codes using a modular single recursion implementation 有权
    使用模块化单递归实现解码纠错码

    公开(公告)号:US20070061688A1

    公开(公告)日:2007-03-15

    申请号:US11207474

    申请日:2005-08-18

    IPC分类号: H03M13/00

    CPC分类号: H03M13/1525 H03M13/1515

    摘要: Systems and methods are provided for performing error correction decoding. The coefficients of the error locator polynomial are iteratively determined for each codeword using a modular implementation of a single recursion key-equation solver algorithm. According to this implementation, a plurality of modules are used to calculate the current and previous coefficients of the error locator polynomial. One module is used for each correctable error. The modular single recursion implementation is programmable, because the number of modules can be easily changed to correct any number of correctable errors. Galois field tower arithmetic can be used to calculate the inverse of an error term. Galois field tower arithmetic greatly reduces the size of the inversion unit. The latency time can be reduced by placing the computations of the inverse error term outside the critical path of the error locator polynomial algorithm.

    摘要翻译: 提供了用于执行纠错解码的系统和方法。 使用单个递归密钥方程求解算法的模块化实现,针对每个码字迭代确定误差定位多项式的系数。 根据该实现,使用多个模块来计算误差定位多项式的当前系数和先前系数。 一个模块用于每个可纠正的错误。 模块化单递归实现是可编程的,因为可以轻松更改模块数量以更正任何数量的可纠正错误。 伽罗瓦域塔算术可用于计算误差项的倒数。 伽罗瓦域塔算术大大减小了反演单元的大小。 通过将反向误差项的计算置于误差定位多项式算法的关键路径之外,可以减少延迟时间。

    Techniques for performing Galois field logarithms for detecting error locations that require less storage space

    公开(公告)号:US20060195769A1

    公开(公告)日:2006-08-31

    申请号:US11059734

    申请日:2005-02-16

    IPC分类号: H03M13/00

    摘要: To perform error detection and correction on a data sector, syndromes are calculated and used to determine error values and error locations. Logarithmic calculations in Galois field need to be performed to determine the error locations using the syndromes. Finite field vectors are represented as “complex” numbers of the form Az+B. An algorithm is performed using the field vectors represented as complex numbers to generate the error locations. The algorithm requires the use of logarithm calculations. The results of the logarithmic calculations are looked up in two (or more) log tables. The log tables store all the possible results of the logarithm calculations. The log tables store significantly less bits than prior art techniques, reducing the amount of storage space required by a factor of 171. Techniques for controlling accesses to the log tables in an efficient manner are also provided.

    Dual channel partial response system
    10.
    发明授权
    Dual channel partial response system 失效
    双通道部分响应系统

    公开(公告)号:US4609907A

    公开(公告)日:1986-09-02

    申请号:US666842

    申请日:1984-10-31

    CPC分类号: G11B20/1426 G06T9/005

    摘要: Method and apparatus is described for encoding and decoding a stream of randomly distributed binary bits representing digital data, including an encoder for encoding the bit stream to achieve a run length limited, partial response coding of the stream; a recording medium for recording the encoded stream; and a decoding system for recovering timing signals and a stream of data signals separately from the recorded stream using a first channel for decoding the recorded stream to recover a timing signal stream; therefrom; and a second channel for decoding the recorded stream to recover a stream of data signals therefrom.

    摘要翻译: 描述了用于对表示数字数据的随机分布的二进制比特流进行编码和解码的方法和装置,包括用于编码比特流的编码器,以实现该流的游程长度有限的部分响应编码; 用于记录编码流的记录介质; 以及解码系统,用于使用用于对记录的流进行解码以恢复定时信号流的第一信道来从记录的流中分离地恢复定时信号和数据信号流; 由此; 以及用于解码所记录的流以从其恢复数据信号流的第二信道。