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4 条记录 (耗时 0.012 秒)

    Coating method and article produced thereby
    2.
    发明授权
    Coating method and article produced thereby 失效
    由此制造涂布方法和制品

    公开(公告)号：US4229495A

    公开(公告)日：1980-10-21

    申请号：US971301

    申请日：1978-12-20

    申请人： Minoru Takahashi ,  Osamu Ishii ,  Masanori Naito ,  Yoshinobu Kusuhara ,  Naofumi Imahigashi

    发明人： Minoru Takahashi ,  Osamu Ishii ,  Masanori Naito ,  Yoshinobu Kusuhara ,  Naofumi Imahigashi

    IPC分类号： C09D1/00 ,  C09D1/02 ,  C09D5/00 ,  C09D5/10 ,  C09D183/00 ,  C09D183/02 ,  F16L58/06 ,  F16L58/10

    CPC分类号： C09D5/10 ,  C09D183/02

    摘要： A primer coating composition comprising (1) a mixture of more than 50% by weight of aluminum powder and less than 50% by weight of zinc powder, and (2) at least one C.sub.1-4 -alkyl silicate, the weight ratio of (1) to (2) being 60:40 to 95:5. The composition is employed in a coating method which comprises applying a primer dispersion to the surface of a substrate to be coated. The primer disbersion is a dispersion of a mixture of more than 50% by weight of aluminum powder and less than 50% by weight of zinc powder in a solution of at least one organic solvent-soluble C.sub.1-4 -alkyl silicate in an organic solvent. The weight ratio of the metal powder to the alkyl silicate is as indicated. The coating is baked and a finishing powder paint is coated on the resulting primer. The finished coating is then baked.

    摘要翻译： 一种底漆涂料组合物，其包含（1）大于50重量％的铝粉末和小于50重量％的锌粉末的混合物，和（2）至少一种C 1-4烷基硅酸盐，重量比（ 1）〜（2）为60:40〜95:5。 该组合物用于涂布方法，其包括将底漆分散体施加到待涂布的基材的表面。 底漆消溶剂是在至少一种有机溶剂可溶性C 1-4烷基硅酸酯在有机溶剂中的溶液中的大于50重量％的铝粉末和小于50重量％的锌粉末的混合物的分散体 。 金属粉末与硅酸烷基酯的重量比如所示。 烘烤该涂层，并在所得底漆上涂覆整理粉末涂料。 然后烘烤完成的涂层。

    Information processing system having performance measurement capabilities
    4.
    发明授权
    Information processing system having performance measurement capabilities 失效
    具有性能测量功能的信息处理系统

    公开(公告)号：US5651112A

    公开(公告)日：1997-07-22

    申请号：US605688

    申请日：1996-02-22

    申请人： Atsushi Matsuno ,  Masanori Naito ,  Hiroshi Kobayashi ,  Masanori Horie ,  Hideki Sato ,  Masayuki Tanji ,  Shigeaki Wada ,  Toshimasa Saika

    发明人： Atsushi Matsuno ,  Masanori Naito ,  Hiroshi Kobayashi ,  Masanori Horie ,  Hideki Sato ,  Masayuki Tanji ,  Shigeaki Wada ,  Toshimasa Saika

    IPC分类号： G06F11/28 ,  G06F11/20 ,  G06F11/32 ,  G06F11/34 ,  G06F11/00

    CPC分类号： G06F11/3466 ,  G06F11/3495 ,  G06F11/20 ,  G06F11/323 ,  G06F11/3419 ,  G06F2201/88

    摘要： An information processing system capable of performance measurement by the use of a small amount of mounted hardware. The information processing system having central processors installed therein comprises a control circuit, and a performance measurement validation register for specifying whether a performance measurement function is valid or invalid. In a case where the validity of the measurement function has been specified by the register, the control circuit operates one loop in a duplex configuration as a performance measurement facility. At this time, counter #1-counter #3 are used as counters for totalizing performance information. On the other hand, in a case where the invalidity of the measurement function has been specified, both loops in the duplex configuration are operated as the central processors. At this time, the counter #1-the counter #3 are used as timer counters for controlling buses.

    摘要翻译： 一种能够通过使用少量安装的硬件进行性能测量的信息处理系统。 其中安装有中央处理器的信息处理系统包括控制电路和用于指定性能测量功能是有效还是无效的性能测量验证寄存器。 在由寄存器指定测量功能的有效性的情况下，控制电路以双工配置的一个环路作为性能测量设备进行操作。 此时，计数器＃1计数器＃3被用作累计性能信息的计数器。 另一方面，在指定了测量功能的无效的情况下，双工配置中的两个环路都作为中央处理器进行操作。 此时，计数器＃1-计数器＃3用作控制总线的定时器计数器。