公开(公告)号：US20120176113A1

公开(公告)日：2012-07-12

申请号：US13420710

申请日：2012-03-15

申请人： Matthew A. Grant

发明人： Matthew A. Grant

IPC分类号： G05F1/565

CPC分类号： H02M3/156 ,  H02M2001/0009 ,  H05B33/0818 ,  Y02B20/347

摘要： A step-down (buck) switching regulator regulates output current without sensing a current external to a converter integrated circuit. The regulator generates a set current that is indicative of a predetermined current level to which the output current is regulated. The regulator generates a sense current whose magnitude is proportional to an inductor current flowing through a power switch during an on time. During a first time period, the sense current is less than the set current. During a second time period, the sense current is greater than the set current. The output current of the regulator is maintained at the predetermined current level such that the first time period is equal to the second time period when the output current equals the predetermined current level. The set current is compared to the sense current in circuitry inside a bootstrap power generator whose voltage fluctuates with the voltage across the inductor.

摘要翻译： 降压（降压）开关稳压器调节输出电流，而不会感测转换器集成电路外部的电流。 调节器产生指示输出电流被调节到的预定电流电平的设定电流。 调节器产生感测电流，其大小与在导通时间内流过功率开关的电感电流成比例。 在第一时间段期间，感测电流小于设定电流。 在第二时间段期间，感测电流大于设定电流。 调节器的输出电流保持在预定电流电平，使得第一时间段等于输出电流等于预定电流电平的第二时间段。 将设定电流与自举电源内的电路中的感测电流进行比较，其电压随着电感器两端的电压而波动。

公开(公告)号：US07795761B2

公开(公告)日：2010-09-14

申请号：US12317223

申请日：2008-12-19

申请人： Steven Huynh ,  Matthew A. Grant ,  Lin Chen

发明人： Steven Huynh ,  Matthew A. Grant ,  Lin Chen

IPC分类号： H01H9/54

CPC分类号： H02M3/158 ,  H02J7/0065 ,  H02M3/07 ,  Y10T307/50 ,  Y10T307/944

摘要： A power converter having a switched capacitor buck/boost operation has first and second switches coupled to a first switching node, third and fourth switches coupled to a second switching node, a capacitor coupled between the first and second switching nodes, and an inductor coupled to the first switching node. A switch controller controls the switches to operate in voltage step-down mode and voltage step-up mode depending on a difference between converter output voltage VOUT and converter input voltage VIN. In a buck-optimized topology operating in a step-down mode, an output current flowing through the first switching node flows through only one switch at a given time. In a boost-optimized topology operating in a step-up mode, an output current flowing through the first switching node flows through only one switch at a given time. As a result, a more compact and efficient power converter may be realized at lower cost.

摘要翻译： 具有开关电容降压/升压操作的功率转换器具有耦合到第一开关节点的第一和第二开关，耦合到第二开关节点的第三和第四开关，耦合在第一和第二开关节点之间的电容器以及耦合到 第一个交换节点。 开关控制器根据转换器输出电压VOUT和转换器输入电压VIN之间的差异控制开关工作在降压模式和升压模式。 在降压模式下工作的降压优化拓扑中，流过第一个开关节点的输出电流在给定的时间只流过一个开关。 在升压模式下工作的升压优化拓扑中，流过第一个开关节点的输出电流在给定时间只流过一个开关。 结果，可以以更低的成本实现更紧凑和高效的功率转换器。

公开(公告)号：US20100199249A1

公开(公告)日：2010-08-05

申请号：US12322376

申请日：2009-01-30

申请人： Steven Huynh ,  Matthew A. Grant ,  Gary M. Hurtz ,  David J. Kunst ,  Trey A. Roessig

发明人： Steven Huynh ,  Matthew A. Grant ,  Gary M. Hurtz ,  David J. Kunst ,  Trey A. Roessig

IPC分类号： G06F17/50

CPC分类号： G06F17/5072

摘要： A programmable analog tile integrated circuit placement tool allows a user to manipulate a graphical representation of a first power management integrated circuit (PMIC) tile with respect to a graphical representation of a second PMIC tile in a proposed Multi-Tile Power Management Integrated Circuit (MTPMIC). The novel PMIC tiles have pre-defined physical structures including a bus portion and a memory structure for storing configuration information for configuring the tile. When appropriately placed in a MTPMIC, the bus portions of the selected tiles automatically form a standardized bus that accommodates all signal communication required for a functioning MTPMIC. A remote user with minimal training in analog circuit design may command the placement of individual tiles in a proposed MTPMIC layout. Upon receiving a user response indicating satisfaction with the placement of PMIC tiles, the tool quickly and automatically generates physical layout data suitable for fabrication of the MTPMIC.

摘要翻译： 可编程模拟瓦片集成电路放置工具允许用户相对于所提出的多瓦功率管理集成电路（MTPMIC）中的第二PMIC瓦片的图形表示来操纵第一功率管理集成电路（PMIC）瓦片的图形表示 ）。 新颖的PMIC瓦片具有预定义的物理结构，包括总线部分和用于存储用于配置瓦片的配置信息的存储器结构。 当适当地放置在MTPMIC中时，所选择的瓦片的总线部分自动形成标准化总线，其适应功能性MTPMIC所需的所有信号通信。 在模拟电路设计中具有最少训练的远程用户可以命令在所提出的MTPMIC布局中放置各个瓦片。 当接收到指示对PMIC瓦片的放置的满意的用户响应时，该工具快速且自动地生成适于制造MTPMIC的物理布局数据。

公开(公告)号：US20100199247A1

公开(公告)日：2010-08-05

申请号：US12322375

申请日：2009-01-30

申请人： Steven Huynh ,  Matthew A. Grant ,  Gary M. Hurtz ,  David J. Kunst ,  Trey A. Roessig

发明人： Steven Huynh ,  Matthew A. Grant ,  Gary M. Hurtz ,  David J. Kunst ,  Trey A. Roessig

IPC分类号： G06F17/50

CPC分类号： G06F17/5072 ,  G06F1/26 ,  G06F1/3203 ,  G06F12/1408 ,  G06F17/5063 ,  G06F2217/64 ,  G06F2217/78

摘要： A programmable analog tile integrated circuit is configured over a standardized bus by communicating tile configuration information from a first integrated circuit tile, through a second integrated circuit tile, to a third integrated circuit tile. Each of the three integrated circuit tiles is part of an integrated circuit. The standardized bus is formed when the tiles are placed adjacent one another. Data bus and control signal conductors of the adjacent tiles line up and interconnect such that each signal conductor is electrically connected to every tile. Tile configuration information may be written to a selected register identified by an address in any selected one of the tiles using the data bus and control lines, regardless of the relative physical locations of the tile sending and the tile receiving the information. Thus, tile configuration information may pass from one tile to another tile, through any number of intermediate tiles.

摘要翻译： 通过将第一集成电路瓦片中的瓦片配置信息通过第二集成电路瓦片传送到第三集成电路瓦片，在标准化总线上配置可编程模拟瓦片集成电路。 三个集成电路瓦片中的每一个是集成电路的一部分。 当瓦片彼此相邻放置时，形成标准化总线。 相邻瓦片的数据总线和控制信号导体排列并互连，使得每个信号导体电连接到每个瓦片。 可以使用数据总线和控制线将瓦片配置信息写入由任何所选择的瓦片中的地址识别的所选择的寄存器，而不管瓦片发送和瓦片接收信息的相对物理位置。 因此，瓦片配置信息可以通过任何数量的中间瓦片从一个瓦片传递到另一个瓦片。

公开(公告)号：US09003340B2

公开(公告)日：2015-04-07

申请号：US12322375

申请日：2009-01-30

申请人： Steven Huynh ,  Matthew A. Grant ,  Gary M. Hurtz ,  David J. Kunst ,  Trey A. Roessig

发明人： Steven Huynh ,  Matthew A. Grant ,  Gary M. Hurtz ,  David J. Kunst ,  Trey A. Roessig

IPC分类号： G06F17/50

CPC分类号： G06F17/5072 ,  G06F1/26 ,  G06F1/3203 ,  G06F12/1408 ,  G06F17/5063 ,  G06F2217/64 ,  G06F2217/78

摘要： A programmable analog tile integrated circuit is configured over a standardized bus by communicating tile configuration information from a first integrated circuit tile, through a second integrated circuit tile, to a third integrated circuit tile. Each of the three integrated circuit tiles is part of an integrated circuit. The standardized bus is formed when the tiles are placed adjacent one another. Data bus and control signal conductors of the adjacent tiles line up and interconnect such that each signal conductor is electrically connected to every tile. Tile configuration information may be written to a selected register identified by an address in any selected one of the tiles using the data bus and control lines, regardless of the relative physical locations of the tile sending and the tile receiving the information. Thus, tile configuration information may pass from one tile to another tile, through any number of intermediate tiles.

摘要翻译： 通过将第一集成电路瓦片中的瓦片配置信息通过第二集成电路瓦片传送到第三集成电路瓦片，在标准化总线上配置可编程模拟瓦片集成电路。 三个集成电路瓦片中的每一个是集成电路的一部分。 当瓦片彼此相邻放置时，形成标准化总线。 相邻瓦片的数据总线和控制信号导体排列并互连，使得每个信号导体电连接到每个瓦片。 可以使用数据总线和控制线将瓦片配置信息写入由任何所选择的瓦片中的地址识别的所选择的寄存器，而不管瓦片发送和瓦片接收信息的相对物理位置。 因此，瓦片配置信息可以通过任何数量的中间瓦片从一个瓦片传递到另一个瓦片。

公开(公告)号：US08680836B2

公开(公告)日：2014-03-25

申请号：US13420710

申请日：2012-03-15

申请人： Matthew A. Grant

发明人： Matthew A. Grant

IPC分类号： H02M3/156

CPC分类号： H02M3/156 ,  H02M2001/0009 ,  H05B33/0818 ,  Y02B20/347

摘要： A step-down (buck) switching regulator regulates output current without sensing a current external to a converter integrated circuit. The regulator generates a set current that is indicative of a predetermined current level to which the output current is regulated. The regulator generates a sense current whose magnitude is proportional to an inductor current flowing through a power switch during an on time. During a first time period, the sense current is less than the set current. During a second time period, the sense current is greater than the set current. The output current of the regulator is maintained at the predetermined current level such that the first time period is equal to the second time period when the output current equals the predetermined current level. The set current is compared to the sense current in circuitry inside a bootstrap power generator whose voltage fluctuates with the voltage across the inductor.

摘要翻译： 降压（降压）开关稳压器调节输出电流，而不会感测转换器集成电路外部的电流。 调节器产生指示输出电流被调节到的预定电流电平的设定电流。 调节器产生感测电流，其大小与在导通时间内流过功率开关的电感电流成比例。 在第一时间段期间，感测电流小于设定电流。 在第二时间段期间，感测电流大于设定电流。 调节器的输出电流保持在预定电流电平，使得第一时间段等于输出电流等于预定电流电平的第二时间段。 将设定电流与自举电源内的电路中的感测电流进行比较，其电压随着电感器两端的电压而波动。

公开(公告)号：US08159204B2

公开(公告)日：2012-04-17

申请号：US12286510

申请日：2008-09-29

申请人： Matthew A. Grant

发明人： Matthew A. Grant

IPC分类号： G05F1/565 ,  G05F1/575

CPC分类号： H02M3/156 ,  H02M2001/0009 ,  H05B33/0818 ,  Y02B20/347

摘要： A step-down (buck) switching regulator regulates output current without sensing a current external to a converter integrated circuit. The regulator generates a set current that is indicative of a predetermined current level to which the output current is regulated. The regulator generates a sense current whose magnitude is proportional to an inductor current flowing through a power switch during an on time. During a first time period, the sense current is less than the set current. During a second time period, the sense current is greater than the set current. The output current of the regulator is maintained at the predetermined current level such that the first time period is equal to the second time period when the output current equals the predetermined current level. The set current is compared to the sense current in circuitry inside a bootstrap power generator whose voltage fluctuates with the voltage across the inductor.

摘要翻译： 降压（降压）开关稳压器调节输出电流，而不会感测转换器集成电路外部的电流。 调节器产生指示输出电流被调节到的预定电流电平的设定电流。 调节器产生感测电流，其大小与在导通时间内流过功率开关的电感电流成比例。 在第一时间段期间，感测电流小于设定电流。 在第二时间段期间，感测电流大于设定电流。 调节器的输出电流保持在预定电流电平，使得第一时间段等于输出电流等于预定电流电平的第二时间段。 将设定电流与自举电源内的电路中的感测电流进行比较，其电压随着电感器两端的电压而波动。

公开(公告)号：US20100199254A1

公开(公告)日：2010-08-05

申请号：US12322374

申请日：2009-01-30

申请人： Steven Huynh ,  Matthew A. Grant ,  Gary M. Hurtz ,  David J. Kunst ,  Trey A. Roessig

发明人： Steven Huynh ,  Matthew A. Grant ,  Gary M. Hurtz ,  David J. Kunst ,  Trey A. Roessig

IPC分类号： G06F17/50

CPC分类号： G06F17/5072 ,  G06F1/3203 ,  G06F2217/64 ,  G06F2217/78

摘要： A programmable analog tile integrated circuit programming tool communicates a power management control characteristic query soliciting control requirement information for a novel power management integrated circuit (PMIC) tile in a multi-tile power management integrated circuit (MTPMIC). The programming tool receives a user response to the query indicating control requirements across a network. The novel PMIC tiles have a pre-defined physical structure including all memory structures required for configuration of each tile and a bus portion. When combined in a multi-tile power management integrated circuit (MTPMIC), the bus portions of the selected tiles automatically form a standardized bus that accommodates all signal communication required for a functioning MTPMIC. The memory structure of each tile is individually addressable via the standardized bus. Thus, in response to control requirements, the programming tool programs a PMIC tile that is part of a MTPMIC to meet the control requirements.

摘要翻译： 可编程模拟瓦片集成电路编程工具在多瓦片功率管理集成电路（MTPMIC）中传达新型功率管理集成电路（PMIC）瓦片的功率管理控制特性查询请求控制需求信息。 编程工具通过网络接收用户对查询指示控制要求的响应。 新颖的PMIC瓦片具有预定义的物理结构，包括用于配置每个瓦片和总线部分所需的所有存储器结构。 当在多瓦片电源管理集成电路（MTPMIC）中组合时，所选择的瓦片的总线部分自动形成标准化总线，其适应功能性MTPMIC所需的所有信号通信。 每个瓦片的存储器结构可以通过标准化总线单独寻址。 因此，响应于控制要求，编程工具对作为MTPMIC一部分的PMIC瓦片进行编程，以满足控制要求。

公开(公告)号：US20100199246A1

公开(公告)日：2010-08-05

申请号：US12322373

申请日：2009-01-30

申请人： Steven Huynh ,  Matthew A. Grant ,  Gary M. Hurtz ,  David J. Kunst ,  Trey A. Roessig

发明人： Steven Huynh ,  Matthew A. Grant ,  Gary M. Hurtz ,  David J. Kunst ,  Trey A. Roessig

IPC分类号： G06F17/50

CPC分类号： G06F17/5072 ,  G06F17/5063 ,  G06F2217/78

摘要： A programmable analog tile integrated circuit configuration tool communicates a power management control characteristic query soliciting control requirement information for a novel Power Management Integrated Circuit (PMIC) tile in a Multi-Tile Power Management Integrated Circuit (MTPMIC). The configuration tool receives a user response to the query indicating control requirements across a network. The PMIC tile includes configuration registers. Configuration information bit values stored in the configuration registers control the operational characteristics of the functional circuitry of the tile. The configuration registers of each novel PMIC tile are accessible at pre-defined addresses on a standardized bus of the MTPMIC. In response to the user response, the configuration tool generates appropriate tile configuration information for loading the configuration registers such that the PMIC tile within the MTPMIC is programmed to satisfy the user's control requirements.

摘要翻译： 可编程模拟瓦片集成电路配置工具在多瓦片电源管理集成电路（MTPMIC）中传达用于新型电力管理集成电路（PMIC）瓦片的功率管理控制特性查询请求控制要求信息。 配置工具通过网络收到用户对查询指示控制要求的响应。 PMIC瓦片包括配置寄存器。 存储在配置寄存器中的配置信息位值控制瓦片的功能电路的操作特性。 每个新型PMIC瓦片的配置寄存器可以在MTPMIC的标准化总线上的预定义地址处访问。 响应于用户响应，配置工具生成用于加载配置寄存器的适当的瓦片配置信息，使得MTPMIC内的PMIC瓦片被编程以满足用户的控制要求。

公开(公告)号：US08143865B2

公开(公告)日：2012-03-27

申请号：US12229538

申请日：2008-08-22

申请人： Matthew A. Grant

发明人： Matthew A. Grant

IPC分类号： G05F1/59

CPC分类号： H02M3/1582

摘要： An average current-mode controlled converter has a buck mode, a boost mode, and a four-switch mode. In one example, the converter operates in one of the three modes, depending on the difference between the converter output voltage VOUT and the converter input voltage VIN. Whether the four-switch mode is a full-time four-switch mode or a partial four-switch mode is user programmable. The novel converter can also be programmed to operate in other ways. For example, the converter can be programmed so that there is no intervening four-switch mode, but rather the converter operates either in a buck or a boost mode depending on VOUT-VIN. The converter can also be programmed so that the converter always operates in a conventional full-time four-switch mode. In one embodiment, the converter is programmed by setting an offset between two internally generated ramp signals and by setting associated limiting and inverting circuits.

摘要翻译： 平均电流模式控制转换器具有降压模式，升压模式和四开关模式。 在一个示例中，根据转换器输出电压VOUT和转换器输入电压VIN之间的差异，转换器以三种模式之一工作。 四开关模式是全时四开关模式还是部分四开关模式是用户可编程的。 新颖的转换器也可以被编程为以其他方式操作。 例如，转换器可以进行编程，使得不存在中间的四开关模式，而是根据VOUT-VIN，转换器以降压或升压模式运行。 转换器也可以进行编程，以使变频器始终以传统的全时四开关模式工作。 在一个实施例中，通过设置两个内部产生的斜坡信号之间的偏移并且通过设置相关的限制和反相电路来对转换器进行编程。