Hardware performance monitor (HPM) with extended resolution for adaptive voltage scaling (AVS) systems
    1.
    发明授权
    Hardware performance monitor (HPM) with extended resolution for adaptive voltage scaling (AVS) systems 有权
    用于自适应电压调节(AVS)系统的扩展分辨率的硬件性能监视器(HPM)

    公开(公告)号:US08572426B2

    公开(公告)日:2013-10-29

    申请号:US12802020

    申请日:2010-05-27

    IPC分类号: G06F1/00

    CPC分类号: G06F1/3296 Y02D10/172

    摘要: An apparatus includes a delay line having at least two parallel branches, where each branch includes multiple delay cells coupled in series. The delay line is configured to receive an input signal and to propagate the input signal in parallel through the delay cells in the branches. The apparatus also includes multiple sampling circuits configured to sample the input signal at different taps in the branches of the delay line and to output sampled values. The taps in a first of the branches are associated with different amounts of delay compared to the taps in a second of the branches. At least some of the delay cells in the branches of the delay line could have a minimum delay, and a difference in delay between at least one tap in the first branch and at least one tap in the second branch could be less than a smallest of the minimum delays.

    摘要翻译: 一种装置包括具有至少两个平行分支的延迟线,其中每个分支包括串联耦合的多个延迟单元。 延迟线被配置为接收输入信号并且通过分支中的延迟单元并行地传播输入信号。 该装置还包括多个采样电路,其被配置为在延迟线的分支中的不同抽头处采样输入信号并输出​​采样值。 与第二个分支中的抽头相比,第一个分支中的抽头与不同的延迟量相关联。 延迟线的分支中的至少一些延迟单元可以具有最小延迟,并且第一分支中的至少一个抽头与第二分支中的至少一个抽头之间的延迟差可以小于 最小延误。

    Hardware performance monitor (HPM) with extended resolution for adaptive voltage scaling (AVS) systems
    2.
    发明申请
    Hardware performance monitor (HPM) with extended resolution for adaptive voltage scaling (AVS) systems 有权
    用于自适应电压调节(AVS)系统的扩展分辨率的硬件性能监视器(HPM)

    公开(公告)号:US20110291729A1

    公开(公告)日:2011-12-01

    申请号:US12802020

    申请日:2010-05-27

    IPC分类号: H03H11/26

    CPC分类号: G06F1/3296 Y02D10/172

    摘要: An apparatus includes a delay line having at least two parallel branches, where each branch includes multiple delay cells coupled in series. The delay line is configured to receive an input signal and to propagate the input signal in parallel through the delay cells in the branches. The apparatus also includes multiple sampling circuits configured to sample the input signal at different taps in the branches of the delay line and to output sampled values. The taps in a first of the branches are associated with different amounts of delay compared to the taps in a second of the branches. At least some of the delay cells in the branches of the delay line could have a minimum delay, and a difference in delay between at least one tap in the first branch and at least one tap in the second branch could be less than a smallest of the minimum delays.

    摘要翻译: 一种装置包括具有至少两个平行分支的延迟线,其中每个分支包括串联耦合的多个延迟单元。 延迟线被配置为接收输入信号并且通过分支中的延迟单元并行地传播输入信号。 该装置还包括多个采样电路,其被配置为在延迟线的分支中的不同抽头处采样输入信号并输出​​采样值。 与第二个分支中的抽头相比,第一个分支中的抽头与不同的延迟量相关联。 延迟线的分支中的至少一些延迟单元可以具有最小延迟,并且第一分支中的至少一个抽头与第二分支中的至少一个抽头之间的延迟差可以小于 最小延误。