公开(公告)号：US5864712A

公开(公告)日：1999-01-26

申请号：US777858

申请日：1996-12-31

申请人： Richard D. Carmichael ,  Joel M. Ward ,  Michael A. Winchell

发明人： Richard D. Carmichael ,  Joel M. Ward ,  Michael A. Winchell

IPC分类号： G06F13/28 ,  G06F13/10

CPC分类号： G06F13/28

摘要： A method an corresponding apparatus for improving the input/output performance of a computer system under the control of a multi-tasking, multi-threaded operating system. In particular, the invention provides an apparatus and method to interleave contiguous DMA scatter/gather sub blocks of a PRD table corresponding to a first I/O channel with contiguous DMA scatter/gather sub blocks of a PRD table corresponding to a second I/O channel, using a single data manager, while maintaining maximum media bandwidth. DMA block transfers are scheduled by the single data manager based on the availability of data from the I/O devices' buffer memories, thus minimizing both media or network idle time as well as minimizing I/O bus idle time. Near maximum aggregate bandwidth of multiple I/O buses and their associated devices is obtained. The apparatus and method thus provides significant performance advantages over prior techniques having two I/O channel systems implemented with a single data manager. The apparatus and methods of the present invention are also extended to encompass a plurality "n" of data managers interleaving contiguous block transfers among a larger plurality "n+i" of I/O devices.

摘要翻译： 一种用于在多任务多线程操作系统的控制下改善计算机系统的输入/输出性能的相应装置的方法。 特别地，本发明提供了一种装置和方法，用于将与第一I / O通道相对应的PRD表的连续的DMA散射/采集子块交织到与第二I / O对应的PRD表的连续DMA散射/收集子块 通道，使用单个数据管理器，同时保持最大的媒体带宽。 基于来自I / O设备的缓冲存储器的数据的可用性，单个数据管理器调度DMA块传输，从而最小化媒体或网络空闲时间以及最小化I / O总线空闲时间。 获得多个I / O总线及其相关设备的近最大总带宽。 因此，与先前技术相比，装置和方法提供了显着的性能优点，所述技术具有用单个数据管理器实现的两个I / O通道系统。 本发明的装置和方法还被扩展为包含多个“n”个数据管理器，在I / O设备的较大的多个“n + i”之间交织连续块传输。

公开(公告)号：US4965741A

公开(公告)日：1990-10-23

申请号：US258961

申请日：1988-10-17

申请人： Michael A. Winchell ,  Robin L. Steele

发明人： Michael A. Winchell ,  Robin L. Steele

IPC分类号： G06F17/50 ,  G06N5/04

CPC分类号： G06N5/04 ,  G06F17/5045 ,  Y10S706/919 ,  Y10S706/921

摘要： An improved method for interfacing a human user to the combination of an expert system and a computer aided design system, characterized in that the expert system advice is provided in various formats, the expert system provides for interrupted operation with usable intermediate advice, and expert system advice is transportable in relative correspondence into the computer aided design system schematic display environment.

摘要翻译： 一种用于将人类用户与专家系统和计算机辅助设计系统的组合进行接口的改进方法，其特征在于，以各种格式提供专家系统建议，专家系统提供具有可用中间建议的中断操作和专家系统 建议可在相对通信中运输到计算机辅助设计系统示意图显示环境中。

公开(公告)号：US06185171B2

公开(公告)日：2001-02-06

申请号：US09106728

申请日：1998-06-29

申请人： Stephen J. Bassett ,  Michael A. Winchell

发明人： Stephen J. Bassett ,  Michael A. Winchell

IPC分类号： G11B700

CPC分类号： G11B7/0956 ,  G11B19/04 ,  G11B19/26

摘要： A control system in a data storage apparatus and associated methods for attempting to accommodate the vibrations resulting from rotating a data storage medium. The control system comprises a neural network which utilizes detected vibrations resulting from the rotation of data storage media to learn the characteristics of the rotational imbalance of rotating data storage media. Thereafter, the rotation of a data storage medium and/or movement of a data head is controlled based on the characteristics learned.

摘要翻译： 数据存储装置中的控制系统和用于尝试适应旋转数据存储介质产生的振动的相关方法。 控制系统包括神经网络，该神经网络利用由数据存储介质的旋转产生的检测到的振动来学习旋转数据存储介质的旋转不平衡的特性。 此后，基于学习的特征来控制数据存储介质的旋转和/或数据头的移动。

公开(公告)号：US5894560A

公开(公告)日：1999-04-13

申请号：US702998

申请日：1996-08-26

申请人： Richard D. Carmichael ,  Joel M. Ward ,  Michael A. Winchell

发明人： Richard D. Carmichael ,  Joel M. Ward ,  Michael A. Winchell

IPC分类号： G06F13/12 ,  G06F13/28 ,  G06F13/00

CPC分类号： G06F13/28 ,  G06F13/122

摘要： An apparatus and method for improving the input/output performance of a computer system under the control of a multi-tasking, multi-threaded operating system. In particular, the invention provides an apparatus and method to chain contiguous DMA scatter gather sub blocks of a PRD table for channel 0 with contiguous DMA scatter gather sub blocks of a PRD table for channel 1, using a single data manager, while maintaining maximum media bandwidth. DMA block transfers are scheduled based on the availability of data from the I/O device's buffer memory, thus minimizing both media or network idle time as well as minimizing I/O bus idle time. Near maximum aggregate bandwidth of multiple I/O buses and their associated devices is obtained. The apparatus and method thus provides significant performance advantages over prior techniques having two I/O channel systems implemented with a single data manager.

摘要翻译： 一种用于在多任务多线程操作系统的控制下改善计算机系统的输入/输出性能的装置和方法。 特别地，本发明提供了一种装置和方法，用于使用单个数据管理器，使用单个数据管理器链接用于信道0的PRD表的连续DMA散射收集子块，其具有用于信道1的PRD表的连续DMA散射收集子块，同时保持最大媒体 带宽。 基于来自I / O设备的缓冲存储器的数据的可用性来调度DMA块传输，从而最小化媒体或网络空闲时间以及最小化I / O总线空闲时间。 获得多个I / O总线及其相关设备的近最大总带宽。 因此，与先前技术相比，装置和方法提供了显着的性能优点，所述技术具有用单个数据管理器实现的两个I / O通道系统。

公开(公告)号：US4616315A

公开(公告)日：1986-10-07

申请号：US690842

申请日：1985-01-11

申请人： Gary L. Logsdon ,  Mark R. Scheevel ,  Michael A. Winchell

发明人： Gary L. Logsdon ,  Mark R. Scheevel ,  Michael A. Winchell

IPC分类号： G06F12/00 ,  G06F9/44 ,  G06F9/45

CPC分类号： G06F9/4436

摘要： A system memory for a reduction processor which evaluates programs stored as binary graphs employing variable-free applicative language codes. These graphs are made up of nodes, each of which exists in memory and contains as its most significant bit a mark bit which when set indicates that the node is being used in a graph and when reset indicates that the node or storage location is available for future use by the processor. In order to accommodate the scanning of a number of storage locations in parallel, the system memory is divided into a node memory and the mark bit memory so that the mark bits for a number of sequential storage locations can be examined in parallel to determine which node locations are free for use by the graph manager.

摘要翻译： 一种用于还原处理器的系统存储器，其使用无变量的应用语言代码评估存储为二进制图形的程序。 这些图形由节点组成，每个节点都存在于存储器中，并且包含最高有效位的标记位，当设置指示节点正在图形中使用时，并且当复位指示节点或存储位置可用于 未来由处理器使用。 为了平行地适应多个存储位置的扫描，系统存储器被划分为节点存储器和标记位存储器，以便可并行地检查多个顺序存储位置的标记位以确定哪个节点 位置可由图表管理员自由使用。