摘要:
A flyback converter uses primary side sensing to sense the output voltage for regulation feedback. Such sensing requires a predetermined minimum duty cycle even with very light load currents. Therefore, such a minimum duty cycle may create an over-voltage condition. In the flyback phase, after a minimum duty cycle of the power switch at light load currents, a synchronous rectifier turns off approximately when the current through the secondary winding falls to zero to create a discontinuous mode. If it is detected that there is an over-voltage, the synchronous rectifier is turned on for a brief interval to draw a reverse current through the secondary winding. When the synchronous rectifier shuts off, a current flows through the primary winding via a drain-body diode while the power switch is off. Therefore, excess power is transferred from the secondary side to the power source to reduce the over-voltage so is not wasted.
摘要:
A flyback converter uses primary side sensing to sense the output voltage for regulation feedback. Such sensing requires a predetermined minimum duty cycle even with very light load currents. Therefore, such a minimum duty cycle may create an over-voltage condition. In the flyback phase, after a minimum duty cycle of the power switch at light load currents, a synchronous rectifier turns off approximately when the current through the secondary winding falls to zero to create a discontinuous mode. If it is detected that there is an over-voltage, the synchronous rectifier is turned on for a brief interval to draw a reverse current through the secondary winding. When the synchronous rectifier shuts off, a current flows through the primary winding via a drain-body diode while the power switch is off. Therefore, excess power is transferred from the secondary side to the power source to reduce the over-voltage so is not wasted.
摘要:
A regulator for an isolated flyback power supply using primary side sensing. The regulator may include an error circuit configured to generate an error signal representative of the difference between a target value and a measured value, a sample and hold circuit, and a controller circuit. The controller circuit may be configured to cause the sample and hold circuit to sample the value of a derived signal that is derived from a connection to the primary winding at a time when the primary winding is decoupled from the energy-supplying circuit and the diode is conducting current, and to hold the sampled value at least until the diode stops conducting current. The controller circuit may also be configured to cause the held value to be the measured value used by the error circuit.
摘要:
A regulator for an isolated flyback power supply using primary side sensing. The regulator may include an error circuit configured to generate an error signal representative of the difference between a target value and a measured value, a sample and hold circuit, and a controller circuit. The controller circuit may be configured to cause the sample and hold circuit to sample the value of a derived signal that is derived from a connection to the primary winding at a time when the primary winding is decoupled from the energy-supplying circuit and the diode is conducting current, and to hold the sampled value at least until the diode stops conducting current. The controller circuit may also be configured to cause the held value to be the measured value used by the error circuit.
摘要:
A flyback converter uses primary side sensing to sense the output voltage for regulation feedback. A comparator on the primary side detects whether the output voltage has exceeded a predetermined regulated voltage by a first threshold to detect an over-voltage condition, resulting from a current generated by the converter exceeding the load current. Triggering of the comparator causes the converter to enter a non-switching sleep mode, whereby the output voltage droops over a period of time. When the output voltage has drooped below the predetermined regulated voltage by a second threshold, a synchronous rectifier is controlled to turn on, then off, to generate a pulse in the primary winding. Upon detection of the pulse, the sleep mode is terminated, and normal operation resumes until a regulated voltage is achieved or until the first threshold is again exceeded by the output voltage.
摘要:
A regulator may include a load voltage sensing circuit configured to generate a feedback signal representative of output voltage from an isolated flyback converter. The regulator may include a pulse generator configured to controllably generate the pulses and to increase at least one off time and at least one period of the pulses after a load on the flyback converter decreases.
摘要:
A flyback converter uses primary side sensing to sense the output voltage for regulation feedback. A comparator on the primary side detects whether the output voltage has exceeded a predetermined regulated voltage by a first threshold to detect an over-voltage condition, resulting from a current generated by the converter exceeding the load current. Triggering of the comparator causes the converter to enter a non-switching sleep mode, whereby the output voltage droops over a period of time. When the output voltage has drooped below the predetermined regulated voltage by a second threshold, a synchronous rectifier is controlled to turn on, then off, to generate a pulse in the primary winding. Upon detection of the pulse, the sleep mode is terminated, and normal operation resumes until a regulated voltage is achieved or until the first threshold is again exceeded by the output voltage.
摘要:
A regulator may include a load voltage sensing circuit configured to generate a feedback signal representative of output voltage from an isolated flyback converter. The regulator may include a pulse generator configured to controllably generate the pulses and to increase at least one off time and at least one period of the pulses after a load on the flyback converter decreases.