Double gate thin-film transistor and method for forming the same
    1.
    发明申请
    Double gate thin-film transistor and method for forming the same 审中-公开
    双栅极薄膜晶体管及其形成方法

    公开(公告)号:US20070207574A1

    公开(公告)日:2007-09-06

    申请号:US11520763

    申请日:2006-09-14

    IPC分类号: H01L21/84 H01L21/00

    CPC分类号: H01L29/6675 H01L29/78648

    摘要: A double-gate thin-film transistor and a method for forming the same, using low-temperature poly-silicon formed by direct deposition on a substrate so as to simplify the manufacturing process and improve the electrical characteristics. The double-gate thin-film transistor comprises: a first patterned electrode formed on a substrate; a first dielectric layer; a poly-silicon film, formed by direct deposition on the first dielectric layer so as to form between the poly-silicon film and the first dielectric layer an incubation layer comprising amorphous silicon; a pair of second patterned electrodes, formed on the poly-silicon film so as to define in the poly-silicon film and the incubation layer between the second patterned electrodes a channel region corresponding to the first patterned electrode; a second dielectric layer; and a third patterned electrode corresponding to the channel region. The method comprises steps of: providing a substrate, a first patterned electrode being formed on the substrate; forming a first dielectric layer; forming a poly-silicon film by direct deposition on the first dielectric layer so as to form between the poly-silicon film and the first dielectric layer an incubation layer comprising amorphous silicon; forming a pair of second patterned electrodes on the poly-silicon film so as to define in the poly-silicon film and the incubation layer between the second patterned electrodes a channel region corresponding to the first patterned electrode; forming a second dielectric layer; and forming a third patterned electrode corresponding to the channel region.

    摘要翻译: 一种双栅极薄膜晶体管及其制造方法,使用通过直接沉积形成在基板上的低温多晶硅,以简化制造工艺并提高电气特性。 双栅极薄膜晶体管包括:形成在衬底上的第一图案化电极; 第一电介质层; 通过直接沉积在所述第一介电层上形成多晶硅膜,以在所述多硅膜和所述第一介电层之间形成包含非晶硅的温育层; 形成在所述多晶硅膜上的一对第二图案化电极,以在所述多晶硅膜中限定所述第二图案化电极与所述第一图案化电极对应的沟道区域之间的温育层; 第二电介质层; 以及对应于沟道区的第三图案化电极。 该方法包括以下步骤:提供衬底,形成在衬底上的第一图案化电极; 形成第一电介质层; 通过直接沉积在所述第一介电层上形成多晶硅膜,以在所述多晶硅膜和所述第一介电层之间形成包含非晶硅的温育层; 在所述多晶硅膜上形成一对第二图案化电极,以在所述多晶硅膜中限定所述第二图案化电极与所述第一图案化电极对应的沟道区域之间的温育层; 形成第二电介质层; 以及形成对应于沟道区的第三图案化电极。