公开(公告)号：US06315878B1

公开(公告)日：2001-11-13

申请号：US09670255

申请日：2000-09-26

申请人： Nalin Patadia ,  Charles Carlson

发明人： Nalin Patadia ,  Charles Carlson

IPC分类号： C23C1434

CPC分类号： H01L21/68735 ,  C23C14/50 ,  H01L21/68742 ,  H01L21/6875 ,  Y02P70/605

摘要： The present invention provides optimized designs that allow the coverage of the full surface of a receiving face in a substrate while at the same time reducing material deposition on the edge of the substrate, material deposition on and/or scratching of the backside of the substrate. While the methods and apparatus of the invention are described within the framework of aluminum deposition chambers, it is contemplated that the invention will be equally effective in all other semiconductor processing chambers where avoiding edge and/or backside deposition, scratching, and/or sticking may be desirable. The invention provides a support member having a deposit collection channel with slanted walls to trap deposit particles that do not depose of the substrate thus preventing deposition and sticking in the backside of a processed substrate. The invention also provides a resting and lifting mechanism to minimize friction between the backside of the substrate and the support member thus reducing contamination of the chamber environment by particles released due to scratching of the backside of the substrate.

摘要翻译： 本发明提供了优化的设计，其允许在衬底中覆盖接收面的整个表面，同时减少衬底边缘上的材料沉积，衬底的背面上的材料沉积和/或刮擦。 尽管在铝沉积室的框架内描述了本发明的方法和装置，但是预期本发明在所有其他半导体处理室中同样有效，其中避免边缘和/或背面沉积，刮擦和/或粘附可能 是理想的 本发明提供了一种支撑构件，其具有具有倾斜壁的沉积物收集通道，以捕获不会沉积基底的沉积物颗粒，从而防止沉积并粘附在经处理的基底的背面。 本发明还提供了一种静止和提升机构，以最小化衬底的背面与支撑构件之间的摩擦，从而减少由于衬底的背面刮擦而释放的颗粒对室环境的污染。

公开(公告)号：US06190037B1

公开(公告)日：2001-02-20

申请号：US09253220

申请日：1999-02-19

申请人： Ashok Das ,  Nety Krishna ,  Marc Schweitzer ,  Nalin Patadia ,  Wei Yang ,  Umesh Kelkar ,  Vijay Parkhe ,  Scot Petitt ,  Nitin Khurana

发明人： Ashok Das ,  Nety Krishna ,  Marc Schweitzer ,  Nalin Patadia ,  Wei Yang ,  Umesh Kelkar ,  Vijay Parkhe ,  Scot Petitt ,  Nitin Khurana

IPC分类号： G01J500

CPC分类号： G01J5/041 ,  G01J5/0022

摘要： The present invention provides an apparatus and method for measuring the temperature of a moving radiant object. A probe, such as a pyrometer, is disposed in an opening of a vacuum chamber adjacent a radiation transparent window. The probe defines an optical path which intercepts the radiant object entering or exiting a processing chamber. The radiant object is moved through the optical path and emits electromagnetic waves. The electromagnetic waves are collected by the probe and transmitted to a signal processing unit where the waves are detected and converted to a temperature reading. If desired, the accumulated data may then be used to generate a cooling curve representing the thermal effects experienced by the radiant object. Extrapolation or correlation methods may be used to extend the cooling curve to points in time prior to or after the data collected by the probe.

摘要翻译： 本发明提供了一种用于测量运动辐射物体的温度的装置和方法。 诸如高温计的探针设置在与辐射透明窗相邻的真空室的开口中。 探针限定了拦截进入或离开处理室的辐射物体的光路。 辐射物体通过光路移动并发射电磁波。 电磁波由探头收集并传输到信号处理单元，在该信号处理单元检测波并将其转换为温度读数。 如果需要，则可以使用累积的数据来产生表示辐射物体经历的热效应的冷却曲线。 可以使用外推法或相关方法将冷却曲线延伸到由探针收集的数据之前或之后的时间点。

公开(公告)号：US6146504A

公开(公告)日：2000-11-14

申请号：US84200

申请日：1998-05-21

申请人： Nalin Patadia ,  Charles Carlson

发明人： Nalin Patadia ,  Charles Carlson

IPC分类号： C23C14/50 ,  H01L21/203 ,  H01L21/285 ,  H01L21/683 ,  H01L21/687 ,  C23C14/34

CPC分类号： H01L21/68735 ,  C23C14/50 ,  H01L21/68742 ,  H01L21/6875 ,  Y02P70/605

摘要： The present invention provides optimized designs that allow the coverage of the full surface of a receiving face in a substrate while at the same time reducing material deposition on the edge of the substrate, material deposition on and/or scratching of the backside of the substrate. While the methods and apparatus of the invention are described within the framework of aluminum deposition chambers, it is contemplated that the invention will be equally effective in all other semiconductor processing chambers where avoiding edge and/or backside deposition, scratching, and/or sticking may be desirable. The invention provides a support member having a deposit collection channel with slanted walls to trap deposit particles that do not depose of the substrate thus preventing deposition and sticking in the backside of a processed substrate. The invention also provides a resting and lifting mechanism to minimize friction between the backside of the substrate and the support member thus reducing contamination of the chamber environment by particles released due to scratching of the backside of the substrate.

摘要翻译： 本发明提供了优化的设计，其允许在衬底中覆盖接收面的整个表面，同时减少衬底边缘上的材料沉积，衬底的背面上的材料沉积和/或刮擦。 尽管在铝沉积室的框架内描述了本发明的方法和装置，但是预期本发明在所有其他半导体处理室中同样有效，其中避免边缘和/或背面沉积，刮擦和/或粘附可能 是理想的 本发明提供了一种支撑构件，其具有具有倾斜壁的沉积物收集通道，以捕获不会沉积基底的沉积物颗粒，从而防止沉积并粘附在经处理的基底的背面。 本发明还提供了一种静止和提升机构，以最小化衬底的背面与支撑构件之间的摩擦，从而减少由于衬底的背面刮擦而释放的颗粒对室环境的污染。

公开(公告)号：US6030513A

公开(公告)日：2000-02-29

申请号：US985644

申请日：1997-12-05

申请人： Nayana Ghantiwala ,  Nalin Patadia

发明人： Nayana Ghantiwala ,  Nalin Patadia

IPC分类号： G01N27/22 ,  H01L23/544 ,  C23C14/34 ,  C23C16/00

CPC分类号： H01L22/34

摘要： A mask for covering a substrate for performing capacitance-voltage measurements on the substrate is a full-faced mask covering substantially all of the substrate. The mask may include a ring with one or more strips across the ring with holes in the strips for target material deposition. In an alternative embodiment, the mask may be a disk with holes at various locations across the disk. In either embodiment, the mask generally conforms to the shape of the substrate, so that the clamp ring of the PVD chamber seats on the mask or on the substrate, so little or none of the plasma or sputtered material can escape between the substrate and clamp ring. Various embodiments of the mask provide different ways to hold the mask on the substrate, such as clamping with clips, gluing with an adhesive, folding extensions of the mask over the edge of the substrate, and holding by surface tension.

摘要翻译： 用于覆盖用于在衬底上进行电容电压测量的衬底的掩模是覆盖基本上所有衬底的全面掩模。 掩模可以包括具有穿过环的一个或多个条带的环，其中用于靶材料沉积的带中的孔。 在替代实施例中，掩模可以是在盘上的不同位置处具有孔的盘。 在任一实施例中，掩模基本上符合基板的形状，使得PVD室的夹紧环位于掩模上或基板上，因此等离子体或溅射材料很少或不会在基板和夹具之间逸出 环。 掩模的各种实施例提供将掩模保持在基板上的不同方式，例如用夹子夹紧，用粘合剂胶合，将掩模的延伸部折叠在基板的边缘上，并通过表面张力保持。