公开(公告)号：US20150214937A1

公开(公告)日：2015-07-30

申请号：US14164252

申请日：2014-01-26

申请人： NIDHI CHAUDHRY ,  Parul K. Sharma

发明人： NIDHI CHAUDHRY ,  Parul K. Sharma

IPC分类号： H03K5/08

CPC分类号： H03K5/08

摘要： A voltage clamping circuit that is implemented using low voltage devices provides a way to discharge an input/output pin to ground during overvoltage conditions and to avoid any interaction between the input/output pin and the input/output supply during clamping action. The voltage clamping circuit is also self-protected. A voltage detection circuit detects an overvoltage condition and in response generates a signal that turns on a PMOS, which in turn provides a clamping current path between the input/output pin and ground.

摘要翻译： 使用低电压器件实现的钳位电路提供了一种在过电压条件下将输入/输出引脚放电到地的方法，并避免了在钳位动作期间输入/输出引脚与输入/输出电源之间的任何相互作用。 电压钳位电路也是自保护的。 电压检测电路检测过电压状态，并且响应于产生导通PMOS的信号，其又在输入/输出引脚与地之间提供钳位电流路径。

公开(公告)号：US08643425B2

公开(公告)日：2014-02-04

申请号：US13235499

申请日：2011-09-19

申请人： Nidhi Chaudhry ,  Parul K. Sharma ,  Amit K. Srivastava

发明人： Nidhi Chaudhry ,  Parul K. Sharma ,  Amit K. Srivastava

IPC分类号： H03L5/00

CPC分类号： H03K3/356182

摘要： An embedded system includes a level shifter circuit for generating a forward supply voltage level in a predefined range. A sense circuit senses a core supply voltage level of the embedded system and compares the sensed core supply voltage level with a predetermined minimum core supply voltage level needed to generate the forward supply voltage. A reset circuit maintains one or more input nodes and one or more internal nodes of the level shifter circuit at a predetermined voltage level when the core supply voltage level is less than the predetermined minimum core supply voltage level.

摘要翻译： 嵌入式系统包括用于在预定范围内产生正向电源电压电平的电平移位器电路。 感测电路感测嵌入式系统的核心电源电压电平，并将检测到的核心电源电压电平与产生正向电源电压所需的预定最小核心电源电压电平进行比较。 当核心电源电压低于预定的最小核心电源电压电平时，复位电路将电平移位器电路的一个或多个输入节点和一个或多个内部节点维持在预定的电压电平。

公开(公告)号：US20160187900A1

公开(公告)日：2016-06-30

申请号：US14582209

申请日：2014-12-24

申请人： Kailash Dhiman ,  Nidhi Chaudhry ,  Divya Tripathi

发明人： Kailash Dhiman ,  Nidhi Chaudhry ,  Divya Tripathi

IPC分类号： G05F1/46

CPC分类号： G05F1/46

摘要： A voltage regulator circuit with two series connected resistors connected together at a common resistor node. An initial conducting path has a first pass transistor with a first terminal connected to a first supply rail and a second terminal connected to a regulated output voltage. A main conducting path has a second pass transistor with a first terminal connected to the first supply rail and a second terminal connected to the regulated output voltage. A comparator has an input connected to the common resistor node output is connected to a gate of the first pass transistor. A voltage threshold switch is connected to the common resistor node, and based on the voltage at the common resistor node the voltage threshold switch selectively connects a gate of the second pass transistor to the comparator output.

摘要翻译： 一个具有两个串联电阻的电压调节器电路，在公共电阻节点连接在一起。 初始导电路径具有第一通道晶体管，其第一端子连接到第一电源轨和连接到调节输出电压的第二端子。 主导电路径具有第二通道晶体管，其第一端子连接到第一电源轨和连接到调节输出电压的第二端子。 比较器具有连接到公共电阻器节点输出的输入端连接到第一通道晶体管的栅极。 电压阈值开关连接到公共电阻器节点，并且基于公共电阻器节点处的电压，电压阈值开关选择性地将第二传输晶体管的栅极连接到比较器输出。

公开(公告)号：US09065441B2

公开(公告)日：2015-06-23

申请号：US13759056

申请日：2013-02-05

申请人： Nidhi Chaudhry ,  Ravi Dixit ,  Parul K. Sharma

发明人： Nidhi Chaudhry ,  Ravi Dixit ,  Parul K. Sharma

IPC分类号： H02J1/10 ,  H03K19/0185 ,  H03K5/24

CPC分类号： H03K19/018521 ,  H03K5/2481 ,  Y10T307/50

摘要： A circuit for scaling down first and second input voltages includes first and second voltage scale-down circuits that scale down the first and second input voltages, respectively. The first voltage scale-down circuit includes a transistor that receives the first input voltage at its gate and, operating in a source-follower configuration, scales down the first input voltage to generate a first output voltage at its source. The second voltage scale-down circuit is identical to the first voltage scale-down circuit and generates a second output voltage based on the second input voltage.

摘要翻译： 用于缩小第一和第二输入电压的电路包括分别缩小第一和第二输入电压的第一和第二电压降压电路。 第一电压降压电路包括晶体管，其在其栅极处接收第一输入电压，并且以源极跟随器配置运行，降低第一输入电压以在其源极处产生第一输出电压。 第二电压降压电路与第一电压降压电路相同，并且基于第二输入电压产生第二输出电压。

公开(公告)号：US20130069707A1

公开(公告)日：2013-03-21

申请号：US13235499

申请日：2011-09-19

申请人： Nidhi CHAUDHRY ,  Parul K. Sharma ,  Amit K. Srivastava

发明人： Nidhi CHAUDHRY ,  Parul K. Sharma ,  Amit K. Srivastava

IPC分类号： H03L5/00

CPC分类号： H03K3/356182

摘要： An embedded system includes a level shifter circuit for generating a forward supply voltage level in a predefined range. A sense circuit senses a core supply voltage level of the embedded system and compares the sensed core supply voltage level with a predetermined minimum core supply voltage level needed to generate the forward supply voltage. A reset circuit maintains one or more input nodes and one or more internal nodes of the level shifter circuit at a predetermined voltage level when the core supply voltage level is less than the predetermined minimum core supply voltage level.

摘要翻译： 嵌入式系统包括用于在预定范围内产生正向电源电压电平的电平移位器电路。 感测电路感测嵌入式系统的核心电源电压电平，并将检测到的核心电源电压电平与产生正向电源电压所需的预定最小核心电源电压电平进行比较。 当核心电源电压低于预定的最小核心电源电压电平时，复位电路将电平移位器电路的一个或多个输入节点和一个或多个内部节点维持在预定的电压电平。

公开(公告)号：US09088274B1

公开(公告)日：2015-07-21

申请号：US14164252

申请日：2014-01-26

申请人： Nidhi Chaudhry ,  Parul K. Sharma

发明人： Nidhi Chaudhry ,  Parul K. Sharma

IPC分类号： H03K5/08

CPC分类号： H03K5/08

摘要： A voltage clamping circuit that is implemented using low voltage devices provides a way to discharge an input/output pin to ground during overvoltage conditions and to avoid any interaction between the input/output pin and the input/output supply during clamping action. The voltage clamping circuit is also self-protected. A voltage detection circuit detects an overvoltage condition and in response generates a signal that turns on a PMOS, which in turn provides a clamping current path between the input/output pin and ground.

摘要翻译： 使用低电压器件实现的钳位电路提供了一种在过电压条件下将输入/输出引脚放电到地的方法，并避免了在钳位动作期间输入/输出引脚与输入/输出电源之间的任何相互作用。 电压钳位电路也是自保护的。 电压检测电路检测过电压状态，并且响应于产生导通PMOS的信号，其又在输入/输出引脚与地之间提供钳位电流路径。

公开(公告)号：US20140217825A1

公开(公告)日：2014-08-07

申请号：US13759056

申请日：2013-02-05

申请人： Nidhi Chaudhry ,  Ravi Dixit ,  Parul K. Sharma

发明人： Nidhi Chaudhry ,  Ravi Dixit ,  Parul K. Sharma

IPC分类号： H02J1/00

CPC分类号： H03K19/018521 ,  H03K5/2481 ,  Y10T307/50

摘要： A circuit for scaling down first and second input voltages includes first and second voltage scale-down circuits that scale down the first and second input voltages, respectively. The first voltage scale-down circuit includes a transistor that receives the first input voltage at its gate and, operating in a source-follower configuration, scales down the first input voltage to generate a first output voltage at its source. The second voltage scale-down circuit is identical to the first voltage scale-down circuit and generates a second output voltage based on the second input voltage.

摘要翻译： 用于缩小第一和第二输入电压的电路包括分别缩小第一和第二输入电压的第一和第二电压降压电路。 第一电压降压电路包括晶体管，其在其栅极处接收第一输入电压，并且以源极跟随器配置运行，降低第一输入电压以在其源极处产生第一输出电压。 第二电压降压电路与第一电压降压电路相同，并且基于第二输入电压产生第二输出电压。

公开(公告)号：US08493122B1

公开(公告)日：2013-07-23

申请号：US13410267

申请日：2012-03-01

申请人： Nidhi Chaudhry ,  Parul K. Sharma

发明人： Nidhi Chaudhry ,  Parul K. Sharma

IPC分类号： H03K5/08

CPC分类号： H03K19/00315

摘要： A voltage clamping circuit for protecting an input/output (I/O) terminal of an integrated circuit from over shoot and under shoot voltages includes transistors connected to form a current conducting path. A voltage at the I/O pin is detected using a voltage detection circuit. The current conducting path is switched on when the voltage at the I/O pin exceeds a predetermined value.

摘要翻译： 用于保护集成电路的输入/输出（I / O）端子的过压和欠压电压的钳位电路包括连接以形成电流传导路径的晶体管。 使用电压检测电路检测I / O引脚的电压。 当I / O引脚上的电压超过预定值时，电流导通路径接通。