公开(公告)号：US08265902B1

公开(公告)日：2012-09-11

申请号：US12544437

申请日：2009-08-20

申请人： Noel J. Brady ,  Lionel Barker ,  Peter H. Alfke

发明人： Noel J. Brady ,  Lionel Barker ,  Peter H. Alfke

IPC分类号： G04F1/00

CPC分类号： G04F10/005

摘要： A circuit measures a time interval between a first event and a second event. One or more activity inputs receive a respective signal indicating the first and second events. For each activity input, a respective high-speed serial receiver includes a sampling circuit and a deserializer. The sampling circuit generates sample bits from sampling the respective signal at active edges of a clock signal. The deserializer converts the sample bits into a sequence of parallel data words. The sample bits undergo a first change in response to the first event and a second change in response to the second event. An arithmetic circuit receives the sequence of parallel data words from the respective high-speed serial receiver. The arithmetic circuit determines a number of the sample bits between the first and second changes in the sequence of parallel data words. The number measures the time interval between the first and second events.

摘要翻译： 电路测量第一事件和第二事件之间的时间间隔。 一个或多个活动输入接收指示第一和第二事件的相应信号。 对于每个活动输入，相应的高速串行接收器包括采样电路和解串器。 采样电路通过对时钟信号的有效边沿处的相应信号进行采样来产生采样位。 解串器将采样位转换为并行数据字序列。 样本比特响应于第一事件进行第一次改变，响应于第二事件进行第二次改变。 算术电路从各高速串行接收机接收并行数据字序列。 算术电路确定并行数据字序列中的第一和第二变化之间的样本比特数。 该数字测量第一和第二事件之间的时间间隔。

公开(公告)号：US07965801B1

公开(公告)日：2011-06-21

申请号：US12117149

申请日：2008-05-08

申请人： Adrian W. O'Reilly ,  Noel J. Brady

发明人： Adrian W. O'Reilly ,  Noel J. Brady

IPC分类号： H04L7/00 ,  H04L27/06

CPC分类号： H04L7/0338

摘要： Data recovery, as well as associated circuitry and system, is described. An input word stream having a word width of at least one word is obtained and a sliding window is applied to it to resolve phases. Scores for phases are determined at least in part by: subdividing the sliding window into sample portions; applying a homogeneity function to each of the sample portions to determine respective values therefor; and summing sets of the values respectively associated with the phases to provide the scores. A score is selected from the scores according to at least one criterion to select a phase from the phases. A portion of a delayed version of the input word stream is sampled by application of the sliding window thereto using the phase selected to output sampled bits.

摘要翻译： 描述了数据恢复以及相关的电路和系统。 获得具有至少一个字的字宽度的输入字流，并向其施加滑动窗口以解析相位。 阶段的分数至少部分地由以下部分确定：将滑动窗口细分为样本部分; 对每个样本部分应用均匀性函数以确定其各自的值; 并且分别与相位相关联的值的加和来提供分数。 从根据至少一个标准的分数中选出分数，以从相中选择相位。 输入字流的延迟版本的一部分是通过使用所选择的相位来施加滑动窗口来采样的，以输出采样位。

公开(公告)号：US06244392B1

公开(公告)日：2001-06-12

申请号：US09426156

申请日：1999-10-22

申请人： Noel J. Brady

发明人： Noel J. Brady

IPC分类号： B62L360

CPC分类号： B62L1/06 ,  B62L3/00 ,  F16D2127/10

摘要： A bicycle braking system for permitting controlled rotation and continuous power to the wheels of a bicycle during braking of the bicycle to enhance control of the bicycle during braking includes a cylindrical brake pad that is spring loaded within angled slots in a casing. The brake pad is positioned proximate the rim of a wheel and a cable assembly is coupled to the brake pad for urging the brake pad towards an end of the angled slots and against the rim of the wheel to slow rotation of the wheel.

摘要翻译： 一种自行车制动系统，用于在制动自行车的过程中允许对自行车的车轮进行受控旋转和持续动力以增强制动期间自行车的控制，其包括：弹簧加载在壳体内的成角度槽内的圆柱形制动衬块。 刹车片位于车轮的边缘附近，并且电缆组件联接到制动衬块，用于将刹车片推向成角度的狭槽的端部并抵靠车轮的轮缘以减慢车轮的旋转。