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公开(公告)号:US20170093380A1
公开(公告)日:2017-03-30
申请号:US14866469
申请日:2015-09-25
IPC分类号: H03K3/356
CPC分类号: H03K3/356104 , H03K3/0375
摘要: An apparatus is described having a latch circuit. The latch circuit includes redundant data inputs, redundant data outputs, redundant clock inputs and circuitry to self-correct a soft-error.
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公开(公告)号:US06952654B2
公开(公告)日:2005-10-04
申请号:US10662637
申请日:2003-09-15
IPC分类号: G06F17/50 , G01R20060101 , G01R19/00 , G01R19/165 , G01R31/00 , G01V1/00 , H01L21/82 , G06G17/50
CPC分类号: G06F17/5036
摘要: Methods are disclosed for calculating the amount of voltage coupled to a device. In some embodiments, the method may comprise identifying a conductor that is coupled to a device, extracting information regarding the relationship between the conductor coupled to the device and adjacent conductors, extracting information regarding signals that are present in the adjacent conductors, partitioning the signal information into phases, calculating a voltage induced in the conductor coupled to the device during each phase of the partitioned signal, calculating an average voltage induced in the conductor coupled to the device and, flagging the device if the average voltage induced is above a predetermined threshold.
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公开(公告)号:US20140237213A1
公开(公告)日:2014-08-21
申请号:US13772260
申请日:2013-02-20
IPC分类号: G06F9/22
CPC分类号: G06F9/22 , G01T1/026 , G06F11/183 , G06F11/3006 , G06F11/3024 , G06F11/3058 , G06F11/3093
摘要: Described is a processor comprising: a plurality of radiation detectors; a first logic unit to receive outputs from the plurality of radiation detectors, the logic unit to generate an output according to the received outputs, the output of the first logic unit indicating whether the processor was exposed to incoming radiations; and a second logic unit to receive the output from the first logic unit, and to cause the processor to perform an action according to the output from the first logic unit.
摘要翻译: 描述了一种处理器,包括:多个辐射检测器; 第一逻辑单元,用于接收来自所述多个辐射检测器的输出,所述逻辑单元根据所接收的输出生成输出,所述第一逻辑单元的输出指示所述处理器是否暴露于进入的辐射; 以及第二逻辑单元,用于接收来自第一逻辑单元的输出,并且使得处理器根据来自第一逻辑单元的输出执行动作。
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公开(公告)号:US07570508B2
公开(公告)日:2009-08-04
申请号:US10743165
申请日:2003-12-22
申请人: Norbert R. Seifert , Xiaowei Zhu
发明人: Norbert R. Seifert , Xiaowei Zhu
IPC分类号: G11C11/00
CPC分类号: G11C11/4125
摘要: A method and apparatus for reducing soft errors in which the method includes: assigning a plurality of nodes within a storage circuit to a predetermined state; evaluating a plurality of signals coupled to the storage circuit, where evaluating the plurality of signals enables a first node to change from its predetermined state; and actively maintaining a second node in its predetermined state, where actively maintaining the predetermined state reduces the storage circuit's susceptibility to soft errors.
摘要翻译: 一种用于减少软错误的方法和装置,其中所述方法包括:将存储电路内的多个节点分配到预定状态; 评估耦合到所述存储电路的多个信号,其中评估所述多个信号使得第一节点能够从其预定状态改变; 并且主动地保持其预定状态的第二节点,其中主动地保持预定状态降低了存储电路对软错误的敏感性。
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