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公开(公告)号:US06952654B2
公开(公告)日:2005-10-04
申请号:US10662637
申请日:2003-09-15
IPC分类号: G06F17/50 , G01R20060101 , G01R19/00 , G01R19/165 , G01R31/00 , G01V1/00 , H01L21/82 , G06G17/50
CPC分类号: G06F17/5036
摘要: Methods are disclosed for calculating the amount of voltage coupled to a device. In some embodiments, the method may comprise identifying a conductor that is coupled to a device, extracting information regarding the relationship between the conductor coupled to the device and adjacent conductors, extracting information regarding signals that are present in the adjacent conductors, partitioning the signal information into phases, calculating a voltage induced in the conductor coupled to the device during each phase of the partitioned signal, calculating an average voltage induced in the conductor coupled to the device and, flagging the device if the average voltage induced is above a predetermined threshold.
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公开(公告)号:US20050060098A1
公开(公告)日:2005-03-17
申请号:US10662637
申请日:2003-09-15
申请人: Cheolmin Park , David Bertucci , Norbert Seifert , Wei Tai , Raymond Hokinson
发明人: Cheolmin Park , David Bertucci , Norbert Seifert , Wei Tai , Raymond Hokinson
IPC分类号: G06F17/50 , G01R20060101 , G01R19/00 , G01R19/165 , G01R31/00 , G01V1/00 , H01L21/82
CPC分类号: G06F17/5036
摘要: Methods are disclosed for calculating the amount of voltage coupled to a device. In some embodiments, the method may comprise identifying a conductor that is coupled to a device, extracting information regarding the relationship between the conductor coupled to the device and adjacent conductors, extracting information regarding signals that are present in the adjacent conductors, partitioning the signal information into phases, calculating a voltage induced in the conductor coupled to the device during each phase of the partitioned signal, calculating an average voltage induced in the conductor coupled to the device and, flagging the device if the average voltage induced is above a predetermined threshold.
摘要翻译: 公开了用于计算耦合到装置的电压量的方法。 在一些实施例中,该方法可以包括识别耦合到设备的导体,提取关于耦合到设备的导体与相邻导体之间的关系的信息,提取关于存在于相邻导体中的信号的信息,分割信号信息 计算在分隔信号的每个相位期间耦合到器件的导体中感应的电压,计算在耦合到该器件的导体中感应的平均电压,以及如果所感应的平均电压高于预定阈值则标记该器件。
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公开(公告)号:US20120309178A1
公开(公告)日:2012-12-06
申请号:US13486418
申请日:2012-06-01
申请人: JunSung CHOI , Hyun Jong Park , Cheolmin Park , Junyoung Bae , Seonghwan Shin , Dongwook Lee , Wonjo Lee , Youshin Han
发明人: JunSung CHOI , Hyun Jong Park , Cheolmin Park , Junyoung Bae , Seonghwan Shin , Dongwook Lee , Wonjo Lee , Youshin Han
CPC分类号: H01L21/2654 , H01L21/02002 , H01L21/02378 , H01L21/02381 , H01L21/02395 , H01L21/02458 , H01L21/0254 , H01L21/02664 , H01L33/0079
摘要: A method of manufacturing a free-standing substrate includes the steps of growing a first thin film on a heterogeneous substrate, forming an ion implantation layer in the first thin film by implanting ions into the first thin film, dividing the first thin film into an upper thin film and a lower thin film with respect to the ion implantation layer, and growing a second thin film on the upper thin film. The free-standing substrate is manufactured without warping or cracking. No additional processes, such as a laser separation process, for separating the free-standing substrate from the heterogeneous substrate are required.
摘要翻译: 制造自立式基板的方法包括以下步骤:在异相衬底上生长第一薄膜,通过将离子注入到第一薄膜中,在第一薄膜中形成离子注入层,将第一薄膜分成上层 薄膜和相对于离子注入层的下部薄膜,以及在上部薄膜上生长第二薄膜。 独立式基材的制造没有翘曲或开裂。 不需要用于将自立式衬底与异质衬底分离的其它工艺,例如激光分离工艺。
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4.
公开(公告)号:US06893705B2
公开(公告)日:2005-05-17
申请号:US10156700
申请日:2002-05-28
申请人: Edwin L. Thomas , Claudio DeRosa , Cheolmin Park , Michael Fasolka , Bernard Lotz , Anne M. Mayes , Jongsesung Yoon
发明人: Edwin L. Thomas , Claudio DeRosa , Cheolmin Park , Michael Fasolka , Bernard Lotz , Anne M. Mayes , Jongsesung Yoon
IPC分类号: C08L53/00 , C08L53/02 , C09D153/00 , C09D153/02 , B82B1/00 , B82B3/00
CPC分类号: C08L53/00 , C08L53/02 , C08L53/025 , C09D153/00 , C09D153/02 , C09D153/025 , G03F7/0002 , Y10T428/24058 , Y10T428/24074 , Y10T428/24355 , Y10T428/24372 , Y10T428/24967 , Y10T428/249921 , Y10T428/31
摘要: A method and apparatus for orientation of block copolymer microdomains via rapid solidification. Rapid solidification from a solvent may include directional solidification and/or epitaxy to form patterns of microdomains in a film of block copolymer. Microdomains may include various structures formed by components of a block copolymer, such as vertical lamellae, in-plane cylinders, and vertical cylinders, and may depend on film thickness. Orientation of structures in microdomains may be controlled to be approximately uniform, and spatial arrangement of microdomains may be controlled.
摘要翻译: 一种通过快速固化取代嵌段共聚物微区的方法和装置。 来自溶剂的快速固化可以包括定向凝固和/或外延以在嵌段共聚物的膜中形成微区域的图案。 微畴可以包括由嵌段共聚物的组分形成的各种结构,例如垂直薄片,平面内圆柱体和垂直圆柱体,并且可以取决于膜厚度。 可以将微区域中的结构的取向控制为近似均匀,并且可以控制微区域的空间排列。
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公开(公告)号:US20130034951A1
公开(公告)日:2013-02-07
申请号:US13559310
申请日:2012-07-26
申请人: JunSung Choi , Bongmo Park , Kwangje Woo , Joon Hoi Kim , Cheolmin Park
发明人: JunSung Choi , Bongmo Park , Kwangje Woo , Joon Hoi Kim , Cheolmin Park
IPC分类号: H01L21/20
CPC分类号: C04B35/58 , C04B41/009 , C04B41/5062 , C04B41/87 , C04B2111/0025 , C04B2111/00844 , C04B2235/3852 , C30B25/02 , C30B25/20 , C30B29/406 , H01L33/0075 , C04B41/4531
摘要: A method of manufacturing a free-standing gallium nitride (GaN) substrate, by which a free-standing GaN substrate can be manufactured without warping or cracks. The method includes the steps of collecting polycrystalline GaN powder that is deposited in a reactor or on a susceptor in a process of growing single crystalline GaN, loading the collected polycrystalline GaN powder into a forming mold, preparing a polycrystalline GaN substrate by sintering the loaded polycrystalline GaN powder, and forming a single crystalline GaN layer by growing single crystalline GaN over the polycrystalline GaN substrate. It is possible to reduce warping and cracks that are caused, due to the difference in the coefficient of thermal expansion, during the growth or cooling of single crystalline GaN in the process of manufacturing the free-standing GaN substrate.
摘要翻译: 制造自立式氮化镓(GaN)衬底的方法,通过该方法可以制造独立的GaN衬底而没有翘曲或裂纹。 该方法包括在生长单晶GaN的过程中收集沉积在反应器或基座上的多晶GaN粉末的步骤,将收集的多晶GaN粉末加载到成型模具中,通过烧结加载的多晶 GaN粉末,并通过在多晶GaN衬底上生长单晶GaN而形成单晶GaN层。 在制造独立的GaN衬底的过程中,可以减少在单晶GaN的生长或冷却期间由于热膨胀系数的差异而引起的翘曲和裂纹。
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