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公开(公告)号：US08421053B2
公开(公告)日：2013-04-16
申请号：US12934254
申请日：2009-03-23
申请人： Paul Bunyk , Richard David Neufeld , Felix Maibaum
发明人： Paul Bunyk , Richard David Neufeld , Felix Maibaum
CPC分类号： G06N99/002 , B82Y10/00 , G01R1/06755 , G06F15/82 , G06F17/5009 , H01L39/025 , H01L39/223
摘要： A system may include first and second qubits that cross one another and a first coupler having a perimeter that encompasses at least a part of the portions of the first and second qubits, the first coupler being operable to ferromagnetically or anti-ferromagnetically couple the first and the second qubits together. A multi-layered computer chip may include a first plurality N of qubits laid out in a first metal layer, a second plurality M of qubits laid out at least partially in a second metal layer that cross each of the qubits of the first plurality of qubits, and a first plurality N times M of coupling devices that at least partially encompasses an area where a respective pair of the qubits from the first and the second plurality of qubits cross each other.
摘要翻译： 系统可以包括彼此交叉的第一和第二量子位和具有包围第一和第二量子位的部分的至少一部分的周边的第一耦合器，第一耦合器可操作以铁磁或反铁磁耦合第一和第二量子位 第二个量子在一起 多层计算机芯片可以包括布置在第一金属层中的第一多个N个量子位，至少部分地布置在第二金属层中的第二多个量子位，该第二金属层跨越第一多个量子位的每个量子位 以及至少部分地包围来自第一和第二多个量子位的相应的一对量子比特彼此交叉的区域的第一多个N倍M个耦合器件。
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公开(公告)号：US20130007087A1
公开(公告)日：2013-01-03
申请号：US13608836
申请日：2012-09-10
申请人： Alec Maassen van den Brink , Peter Love , Mohammad H. S. Amin , Geordie Rose , David Grant , Miles F. H. Steininger , Paul Bunyk , Andrew J. Berkley
发明人： Alec Maassen van den Brink , Peter Love , Mohammad H. S. Amin , Geordie Rose , David Grant , Miles F. H. Steininger , Paul Bunyk , Andrew J. Berkley
IPC分类号： G06G7/00
摘要： Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
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公开(公告)号：US20050035368A1
公开(公告)日：2005-02-17
申请号：US10638180
申请日：2003-08-11
申请人： Paul Bunyk
发明人： Paul Bunyk
CPC分类号： H04L49/1507
摘要： Superconductor technology and Batcher banyan switching technology are combined and implemented as a practical component in a single cryo-MCM substrate (10) containing a plurality of superconductor chips (37, 38, 39, 41, 42, 43, 44, 46, 48, 49, 51, 53 and 55) arranged in a plurality of rows and columns. Wiring (52) on the substrate connects the chips in each row of a number of the columns (41, 43, 45, 47, 49, 51 & 53) serially to collectively define a Batcher sorter. Other wiring (52) connects the chips in each row of a number of other columns (40, 42, 44 & 48) in reverse banyan and banyan networks. The foregoing includes a novel superconductor Batcher two-bit serial sorter (FIG. 8) and trap (FIG. k9).
摘要翻译： 超导体技术和Batcher榕树切换技术在包含多个超导体芯片（37,38,39,41,42,43,44,46,48， 49,51,53和55）布置成多个行和列。 基板上的布线（52）连接多个列（41,43,45,47,49,51和53）的每行中的芯片，以连续地共同定义一个分组器。 其他布线（52）将反向榕树和榕树网络中的多列其他列（40,42,44和48）的每行中的芯片连接起来。 上述内容包括新型超导体分选器二位串行分类器（图8）和陷阱（图k9）。
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公开(公告)号：US07533068B2
公开(公告)日：2009-05-12
申请号：US11317838
申请日：2005-12-22
申请人： Alec Maassen van den Brink , Peter Love , Mohammad H. S. Amin , Geordie Rose , David Grant , Miles F. H. Steininger , Paul Bunyk , Andrew J. Berkley
发明人： Alec Maassen van den Brink , Peter Love , Mohammad H. S. Amin , Geordie Rose , David Grant , Miles F. H. Steininger , Paul Bunyk , Andrew J. Berkley
摘要： Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
摘要翻译： 提供了用于解决各种计算问题的模拟处理器。 这种模拟处理器包括与多个耦合装置一起布置成格子的多个量子器件。 模拟处理器进一步包括偏置控制系统，每个偏置控制系统被配置为在对应的量子器件上施加局部有效偏 多个耦合装置中的一组耦合装置被配置为耦合格子中的最近邻量子器件。 另一组耦合器件配置成耦合下一个最近邻量子器件。 模拟处理器还包括多个耦合控制系统，每个耦合控制系统被配置为将多个耦合装置中的对应耦合装置的耦合值调谐到耦合。 这种量子处理器还包括一组读出装置，每个读出装置被配置为从多个量子器件中的对应的量子器件测量信息。
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公开(公告)号：US20050243708A1
公开(公告)日：2005-11-03
申请号：US11172688
申请日：2005-06-30
申请人： Paul Bunyk
发明人： Paul Bunyk
CPC分类号： H04L49/1507
摘要： Superconductor technology and Batcher banyan switching technology are combined and implemented as a practical component in a single cryo-MCM substrate (10) containing a plurality of superconductor chips (37, 38, 39, 41, 42, 43, 44, 46, 48, 49, 51, 53 and 55) arranged in a plurality of rows and columns. Wiring (52) on the substrate connects the chips in each row of a number of the columns (41, 43, 45, 47, 49, 51 & 53) serially to collectively define a Batcher sorter. Other wiring (52) connects the chips in each row of a number of other columns (40, 42, 44 & 48) in reverse banyan and banyan networks. The foregoing includes a novel superconductor Batcher two-bit serial sorter (FIG. 8) and trap (FIG. k9).
摘要翻译： 超导体技术和Batcher榕树切换技术在包含多个超导体芯片（37,38,39,41,42,43,44,46,48， 49,51,53和55）布置成多个行和列。 基板上的布线（52）连接多个列（41,43,45,47,49,51和53）的每行中的芯片，以连续地共同定义一个分组器。 其他布线（52）将反向榕树和榕树网络中的多列其他列（40,42,44和48）的每行中的芯片连接起来。 前述内容包括新颖的超导体分选器二位串行排序器（图8）和陷阱（图9）。
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公开(公告)号：US08686751B2
公开(公告)日：2014-04-01
申请号：US13608836
申请日：2012-09-10
申请人： Alexander Maassen van den Brink , Peter Love , Mohammad H. S. Amin , Geordie Rose , David Grant , Miles F. H. Steininger , Paul Bunyk , Andrew J. Berkley
发明人： Alexander Maassen van den Brink , Peter Love , Mohammad H. S. Amin , Geordie Rose , David Grant , Miles F. H. Steininger , Paul Bunyk , Andrew J. Berkley
IPC分类号： H03K19/195
摘要： Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
摘要翻译： 提供了用于解决各种计算问题的模拟处理器。 这种模拟处理器包括与多个耦合装置一起布置成格子的多个量子器件。 模拟处理器进一步包括偏置控制系统，每个偏置控制系统被配置为在对应的量子器件上施加局部有效偏 多个耦合装置中的一组耦合装置被配置为耦合格子中的最近邻量子器件。 另一组耦合器件配置成耦合下一个最近邻量子器件。 模拟处理器还包括多个耦合控制系统，每个耦合控制系统被配置为将多个耦合装置中的对应耦合装置的耦合值调谐到耦合。 这种量子处理器还包括一组读出装置，每个读出装置被配置为从多个量子器件中的对应的量子器件测量信息。
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公开(公告)号：US20110298489A1
公开(公告)日：2011-12-08
申请号：US13210169
申请日：2011-08-15
申请人： Alec Maassen van den Brink , Peter Love , Mohammad H.S. Amin , Geordie Rose , David Grant , Miles F. H. Steininger , Paul Bunyk , Andrew J. Berkley
发明人： Alec Maassen van den Brink , Peter Love , Mohammad H.S. Amin , Geordie Rose , David Grant , Miles F. H. Steininger , Paul Bunyk , Andrew J. Berkley
IPC分类号： H03K19/195
摘要： Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
摘要翻译： 提供了用于解决各种计算问题的模拟处理器。 这种模拟处理器包括与多个耦合装置一起布置成格子的多个量子器件。 模拟处理器进一步包括偏置控制系统，每个偏置控制系统被配置为在对应的量子器件上施加局部有效偏置。 多个耦合装置中的一组耦合装置被配置为耦合格子中的最近邻量子器件。 另一组耦合器件配置成耦合下一个最近邻量子器件。 模拟处理器还包括多个耦合控制系统，每个耦合控制系统被配置为将多个耦合装置中的对应耦合装置的耦合值调谐到耦合。 这种量子处理器还包括一组读出装置，每个读出装置被配置为从多个量子器件中的对应的量子器件测量信息。
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公开(公告)号：US20090167342A1
公开(公告)日：2009-07-02
申请号：US12397999
申请日：2009-03-04
申请人： Alec Maassen van den Brink , Peter Love , Mohammad H.S. Amin , Geordie Rose , David Grant , Miles F. H. Steininger , Paul Bunyk , Andrew J. Berkley
发明人： Alec Maassen van den Brink , Peter Love , Mohammad H.S. Amin , Geordie Rose , David Grant , Miles F. H. Steininger , Paul Bunyk , Andrew J. Berkley
IPC分类号： H03K19/195 , H03K19/20
摘要： Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
摘要翻译： 提供了用于解决各种计算问题的模拟处理器。 这种模拟处理器包括与多个耦合装置一起布置成格子的多个量子器件。 模拟处理器进一步包括偏置控制系统，每个偏置控制系统被配置为在对应的量子器件上施加局部有效偏置。 多个耦合装置中的一组耦合装置被配置为耦合格子中的最近邻量子器件。 另一组耦合器件配置成耦合下一个最近邻量子器件。 模拟处理器还包括多个耦合控制系统，每个耦合控制系统被配置为将多个耦合装置中的对应耦合装置的耦合值调谐到耦合。 这种量子处理器还包括一组读出装置，每个读出装置被配置为从多个量子器件中的对应的量子器件测量信息。
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公开(公告)号：US20070174227A1
公开(公告)日：2007-07-26
申请号：US11608214
申请日：2006-12-07
申请人： Mark Johnson , Paul Bunyk
发明人： Mark Johnson , Paul Bunyk
IPC分类号： G06F15/18
CPC分类号： B82Y10/00 , G06N99/002
摘要： Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, for instance qubits, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
摘要翻译： 提供了用于解决各种计算问题的模拟处理器。 这种模拟处理器与多个耦合装置一起包括多个量子器件，例如量子位，布置在格子中。 模拟处理器进一步包括偏置控制系统，每个偏置控制系统被配置为在对应的量子器件上施加局部有效偏置。 多个耦合装置中的一组耦合装置被配置为耦合格子中的最近邻量子器件。 另一组耦合器件配置成耦合下一个最近邻量子器件。 模拟处理器还包括多个耦合控制系统，每个耦合控制系统被配置为将多个耦合装置中的对应耦合装置的耦合值调谐到耦合。 这样的量子处理器还包括一组读出装置，每个读出装置被配置为从多个量子器件中的对应的量子器件测量信息。
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公开(公告)号：US08195596B2
公开(公告)日：2012-06-05
申请号：US12013192
申请日：2008-01-11
申请人： Geordie Rose , Paul Bunyk , Michael D. Coury , William Macready , Vicky Choi
发明人： Geordie Rose , Paul Bunyk , Michael D. Coury , William Macready , Vicky Choi
IPC分类号： G06N5/00
CPC分类号： B82Y10/00 , G06N99/002
摘要： An analog processor, for example a quantum processor may include a plurality of elongated qubits that are disposed with respect to one another such that each qubit may selectively be directly coupled to each of the other qubits via a single coupling device. Such may provide a fully interconnected topology.
摘要翻译： 模拟处理器，例如量子处理器可以包括相对于彼此设置的多个细长量子位，使得每个量子位可以经由单个耦合器件选择性地直接耦合到每个其它量子位。 这样可以提供完全互连的拓扑。
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