摘要:
In one embodiment, a method of forming a power supply controller may include configuring the power supply controller to control a pass transistor to form an output current responsively to a control signal and independently of the value of the output voltage until the control signal is less than a deviation from a desired value of the output voltage.
摘要:
A one-time programmable memory includes a first one-time programmable memory cell including a fuse core having an input terminal for receiving a trim signal, an output terminal for providing a sense signal, and a fuse. The fuse core conducts current through the fuse in response to the trim signal. The one-time programmable memory cell also includes a sense circuit having an input terminal coupled to the output terminal of the fuse core, and an output terminal for providing a termination signal, and a logic circuit having a first input terminal for receiving a program enable signal, a second input terminal for receiving a data signal, a third input terminal coupled to the output terminal of the sense circuit for receiving the termination signal, and an output terminal coupled to the input terminal of the fuse core for providing the trim signal.
摘要:
In one embodiment, a method of forming a power supply controller may include configuring the power supply controller to control a pass transistor to form an output current responsively to a control signal and independently of the value of the output voltage until the control signal is less than a deviation from a desired value of the output voltage.
摘要:
A one-time programmable memory includes a first one-time programmable memory cell including a fuse core having an input terminal for receiving a trim signal, an output terminal for providing a sense signal, and a fuse. The fuse core conducts current through the fuse in response to the trim signal. The one-time programmable memory cell also includes a sense circuit having an input terminal coupled to the output terminal of the fuse core, and an output terminal for providing a termination signal, and a logic circuit having a first input terminal for receiving a program enable signal, a second input terminal for receiving a data signal, a third input terminal coupled to the output terminal of the sense circuit for receiving the termination signal, and an output terminal coupled to the input terminal of the fuse core for providing the trim signal.