Provision of FIFO buffer in RAM
    1.
    发明授权
    Provision of FIFO buffer in RAM 失效
    在RAM中提供FIFO缓冲区

    公开(公告)号:US5506747A

    公开(公告)日:1996-04-09

    申请号:US356813

    申请日:1994-12-15

    申请人: Peter D. Bain

    发明人: Peter D. Bain

    IPC分类号: G06F5/06 G11C13/00

    CPC分类号: G06F5/065

    摘要: FIFOs having various depths are provided in a RAM in a plurality of groups. For each group, stored numbers B and D determine a base address 2.sup.B in the RAM for the group and a depth 2.sup.D of each FIFO in the group. Each FIFO is identified by a respective FIFO identity having a most significant "1" bit whose position identifies the respective group of FIFOs, less significant bits identifying the respective FIFO in the group. A count C is provided which is common to all of the FIFOs for identifying a respective location in each FIFO. Each FIFO in the RAM is addressed with an address comprising a sum of the base address 2.sup.B, a product of said less significant bits multiplied by 2.sup.D, and a number C mod 2.sup.D, using the stored numbers B and D determined by the respective FIFO identity. The sum can be provided by an OR function.

    摘要翻译: 具有各种深度的FIFO被提供在多个组中的RAM中。 对于每个组,存储的数字B和D确定组中的RAM中的基地址2B和组中每个FIFO的深度2D。 每个FIFO由具有最高有效“1”位的相应FIFO标识识别,其位置标识相应的FIFO组,较少有效位标识组中相应的FIFO。 提供了对所有FIFO共同的用于识别每个FIFO中相应位置的计数C。 RAM中的每个FIFO通过使用由相应的FIFO标识确定的存储号码B和D的基地址2B,乘以2D的所述较低有效位乘以2D的乘积和数字C mod 2D的和来寻址 。 总和可以由OR函数提供。

    INTERPROCESS COMMUNICATION USING A SINGLE SEMAPHORE

    公开(公告)号:US20120185875A1

    公开(公告)日:2012-07-19

    申请号:US13431970

    申请日:2012-03-28

    申请人: Peter D. Bain

    发明人: Peter D. Bain

    IPC分类号: G06F9/54

    CPC分类号: G06F9/52

    摘要: A method to enable communication between software processes includes initiating a plurality of processes, the processes including both attachment processes and target processes. A single semaphore is created and initialized for use by the plurality of processes such that each of the target processes wait on the semaphore. An attachment process writes a message file, identifying a specific target process, to a location accessible by the target processes. The attachment process then increments the semaphore by the number of target processes, thereby unblocking the target processes and allowing them to check the message file. When the specific target process determines that the message file is intended for that target, a connection is established between the attachment process and the specific target process. The attachment process then decrements the semaphore to zero to block the target processes. A corresponding computer program product and apparatus are also disclosed herein.

    Method and apparatus for adjusting the phase and frequency of a periodic wave
    3.
    发明授权
    Method and apparatus for adjusting the phase and frequency of a periodic wave 失效
    用于调节周期波的相位和频率的方法和装置

    公开(公告)号:US07038518B1

    公开(公告)日:2006-05-02

    申请号:US10869479

    申请日:2004-06-16

    申请人: Peter D. Bain

    发明人: Peter D. Bain

    IPC分类号: H03K3/00

    CPC分类号: H03K5/13 H03K2005/00286

    摘要: A delay circuit includes a phase vernier having a plurality of logic components. Each logic component includes a selectable injection input capable of adjusting a phase of an input to the phase vernier.

    摘要翻译: 延迟电路包括具有多个逻辑分量的相位游标。 每个逻辑部件包括能够调整到相位游标的输入的相位的可选择的注入输入。

    Method and apparatus for adjusting the phase and frequency of a periodic wave
    4.
    发明授权
    Method and apparatus for adjusting the phase and frequency of a periodic wave 有权
    用于调节周期波的相位和频率的方法和装置

    公开(公告)号:US06777993B1

    公开(公告)日:2004-08-17

    申请号:US10189924

    申请日:2002-07-03

    申请人: Peter D. Bain

    发明人: Peter D. Bain

    IPC分类号: H03K300

    CPC分类号: H03K5/13 H03K2005/00286

    摘要: A delay circuit includes a phase vernier having a plurality of logic components. Each logic component includes a selectable injection input capable of adjusting a phase of an input to the phase vernier.

    摘要翻译: 延迟电路包括具有多个逻辑分量的相位游标。 每个逻辑部件包括能够调整到相位游标的输入的相位的可选择的注入输入。

    EFFICIENT STRING HASH COMPUTATION
    5.
    发明申请
    EFFICIENT STRING HASH COMPUTATION 审中-公开
    有效的STRING HASH计算

    公开(公告)号:US20140009314A1

    公开(公告)日:2014-01-09

    申请号:US13543010

    申请日:2012-07-06

    IPC分类号: H03M7/34

    CPC分类号: G06F16/2255 G06F16/90344

    摘要: A method for efficiently computing a hash value for a string is disclosed. In one embodiment, such a method includes receiving an original string comprising multiple characters. The method computes an original hash value for the original string. The method produces an updated string by performing at least one of the following updates on the original string: adding leading/trailing characters to the original string; removing leading/trailing characters from the original string, and modifying characters of the original string while preserving the length of the original string. The method then computes an updated hash value for the updated string by performing at least one operation on the original hash value, wherein the at least one operation takes into account the updates that were made to the original string. A corresponding apparatus and computer program product are also disclosed.

    摘要翻译: 公开了一种用于有效地计算字符串的散列值的方法。 在一个实施例中,这种方法包括接收包括多个字符的原始串。 该方法计算原始字符串的原始哈希值。 该方法通过对原始字符串执行以下更新中的至少一个来生成更新的字符串:将前导/后缀字符添加到原始字符串; 从原始字符串中删除前导/后缀字符,并修改原始字符串的字符,同时保留原始字符串的长度。 该方法然后通过对原始散列值执行至少一个操作来计算更新的字符串的更新的散列值,其中至少一个操作考虑对原始字符串进行的更新。 还公开了相应的装置和计算机程序产品。

    INTERPROCESS COMMUNICATION USING A SINGLE SEMAPHORE
    6.
    发明申请
    INTERPROCESS COMMUNICATION USING A SINGLE SEMAPHORE 有权
    使用单片扫描的互动通信

    公开(公告)号:US20120016855A1

    公开(公告)日:2012-01-19

    申请号:US12838341

    申请日:2010-07-16

    申请人: Peter D. Bain

    发明人: Peter D. Bain

    IPC分类号: G06F9/46 G06F17/30

    CPC分类号: G06F9/52

    摘要: A method to enable communication between software processes includes initiating a plurality of processes, the processes including both attachment processes and target processes. A single semaphore is created and initialized for use by the plurality of processes such that each of the target processes wait on the semaphore. An attachment process writes a message file, identifying a specific target process, to a location accessible by the target processes. The attachment process then increments the semaphore by the number of target processes, thereby unblocking the target processes and allowing them to check the message file. When the specific target process determines that the message file is intended for that target, a connection is established between the attachment process and the specific target process. The attachment process then decrements the semaphore to zero to block the target processes. A corresponding computer program product and apparatus are also disclosed herein.

    摘要翻译: 实现软件处理之间的通信的方法包括启动多个进程,该过程包括附件过程和目标过程。 单个信号量被创建并初始化以供多个进程使用,使得每个目标进程等待信号量。 附件过程将识别特定目标进程的消息文件写入目标进程可访问的位置。 附件过程然后将信号量增加目标进程的数量,从而解除目标进程的阻塞,并允许它们检查消息文件。 当特定目标进程确定消息文件是针对该目标时,在附件进程和特定目标进程之间建立连接。 然后,附件过程将信号量递减为零以阻止目标进程。 本文还公开了相应的计算机程序产品和装置。

    Method and apparatus for parallel computation of linear block codes
    7.
    发明授权
    Method and apparatus for parallel computation of linear block codes 有权
    用于并行计算线性块代码的方法和装置

    公开(公告)号:US07225391B1

    公开(公告)日:2007-05-29

    申请号:US10321030

    申请日:2002-12-17

    申请人: Peter D. Bain

    发明人: Peter D. Bain

    IPC分类号: H03M13/00 G06F11/00

    摘要: A method for generating a linear block code is disclosed. A message is broken up into a plurality of sets of bits. A first group of sets is processed to determine a first partial linear block code. An adjusted partial linear block code is generated from the partial linear block code. A second group of sets is processed to determine a second partial linear block code. The adjusted partial linear block code and the second partial linear block code are combined into a single value.

    摘要翻译: 公开了一种用于产生线性块码的方法。 消息被分解成多组位。 处理第一组集合以确定第一部分线性块码。 从部分线性块码生成调整后的部分线性块码。 处理第二组集合以确定第二部分线性块代码。 经调整的部分线性块码和第二部分线性块码组合成单个值。