摘要:
A dual-purpose I/O circuit for use in an integrated circuit having a primary circuit is provided. The dual-purpose I/O circuit includes two conducting pads, two single-ended I/O cells and one differential I/O cell. Several dual-purpose I/O circuits can be used within a single integrated circuit to support both single-ended and/or differential mode I/O signaling between external circuits and devices and a primary circuit within the integrated circuit. Within each dual-purpose I/O circuit, a first single-ended I/O cells is connected to a first conducting pad, a second single-ended I/O cell is connected to the second conducting pad and a differential I/O cell is connected to the both the first single-ended and second single-ended I/O cells and to both the first and second conducting pads. A control logic is connected to at least one of the first single-ended, second single-ended and differential I/O cells. The control logic is arranged to selectively enable and disable at least one of the first single-ended, second single-ended and differential I/O cells. The primary circuit can include any digital and/or analog circuit. The primary circuit can include a combined LINK/PHY circuit configured to support IEEE-1394 standard buses and communications.
摘要:
A semiconductor integrated circuit receives and transmits signals at more than one set of VH/VL voltage levels. The integrated circuit includes a core region, an input pad, an output pad, peripheral circuitry, and a plurality of power supply lines each at power supply voltage levels V1, V2, V3 . . . Vm. The integrated circuit also includes input circuitry and output circuitry each of which have buffers and translators. The availability of the power lines each at power supply voltage levels V1, V2, V3 . . . Vm and translators allows for the present circuit to transmit and receive various sets of input signals and output signals, all within the same integrated circuit.
摘要:
A semiconductor integrated circuit receives and transmits signals at more than one set of VH/VL voltage levels. The integrated circuit includes a core region, an input pad, an output pad, peripheral circuitry, and a plurality of power supply lines each at power supply voltage levels V1, V2, V3 . . . Vm. The integrated circuit also includes input circuitry and output circuitry each of which have buffers and translators. The availability of the power lines each at power supply voltage levels V1, V2, V3 . . . Vm and translators allows for the present circuit to transmit and receive various sets of input signals and output signals, all within the same integrated circuit.