公开(公告)号：US20240126228A1

公开(公告)日：2024-04-18

申请号：US18398709

申请日：2023-12-28

Applicant: Archanna Srinivasan ,  Teik Wah Lim ,  Pravin Chander Chandran

Inventor： Archanna Srinivasan ,  Teik Wah Lim ,  Pravin Chander Chandran

IPC: G05B19/05

CPC classification number: G05B19/056 ,  G05B2219/13004

Abstract: Systems or methods of the present disclosure may provide for implementing design software that is used to design a configuration for a programmable fabric of a programmable logic device. Implementing the design software includes receiving, at a processor, design configuration details for the configuration. Implementing the design software also includes receiving, at the processor, a plurality of constraints including a thermal constraint for the configuration. Moreover, implementing the design software comprises performing thermal aware resource selection based at least in part on the thermal constraint. Furthermore, implementing the design software includes causing the programmable logic device to be operated to stay within the thermal constraint.

公开(公告)号：US08452581B2

公开(公告)日：2013-05-28

申请号：US12436019

申请日：2009-05-05

Applicant: Krishnan Sundaresan ,  Pravin Chander Chandran

Inventor： Krishnan Sundaresan ,  Pravin Chander Chandran

IPC: G06F17/50

CPC classification number: G06F17/5022 ,  G06F2217/78

Abstract: A method for estimating power consumption of a design block of an integrated circuit includes obtaining power consumption data from designs of older-generation microprocessors, selecting a set of power consumption parameters, applying a curve-fitting technique on the obtained power consumption data for the selected set of power consumption parameters, creating a new power consumption model based on the curve-fitting technique and one or more of the power consumption parameters, using the model at a register transfer level of a newer-generation microprocessor to represent estimates of register transfer level power consumption of the newer-generation microprocessor, and outputting the register transfer level power consumption estimates based on the model.

Abstract translation: 一种用于估计集成电路的设计块的功耗的方法包括从旧式微处理器的设计中获得功耗数据，选择一组功耗参数，对所选择的所获得的功耗数据应用曲线拟合技术 一组功耗参数，基于曲线拟合技术和一个或多个功耗参数创建新的功耗模型，使用新一代微处理器的寄存器传输级别的模型来表示寄存器传输级别的估计 新一代微处理器的功耗，并基于该模型输出寄存器传输级功耗估计。

公开(公告)号：US20100286974A1

公开(公告)日：2010-11-11

申请号：US12436019

申请日：2009-05-05

Applicant: Krishnan Sundaresan ,  Pravin Chander Chandran

Inventor： Krishnan Sundaresan ,  Pravin Chander Chandran

IPC: G06F17/50

CPC classification number: G06F17/5022 ,  G06F2217/78

Abstract: A method for estimating power consumption of a design block of an integrated circuit includes obtaining power consumption data from designs of older-generation microprocessors, selecting a set of power consumption parameters, applying a curve-fitting technique on the obtained power consumption data for the selected set of power consumption parameters, creating a new power consumption model based on the curve-fitting technique and one or more of the power consumption parameters, using the model at a register transfer level of a newer-generation microprocessor to represent estimates of register transfer level power consumption of the newer-generation microprocessor, and outputting the register transfer level power consumption estimates based on the model.

Abstract translation: 一种用于估计集成电路的设计块的功耗的方法包括从旧式微处理器的设计中获得功耗数据，选择一组功耗参数，对所选择的所获得的功耗数据应用曲线拟合技术 一组功耗参数，基于曲线拟合技术和一个或多个功耗参数创建新的功耗模型，使用新一代微处理器的寄存器传输级别的模型来表示寄存器传输级别的估计 新一代微处理器的功耗，并基于该模型输出寄存器传输级功耗估计。