公开(公告)号：US20100111156A1

公开(公告)日：2010-05-06

申请号：US12426987

申请日：2009-04-21

申请人： Yan-Bin Luo ,  Qui-Ting Chen

发明人： Yan-Bin Luo ,  Qui-Ting Chen

IPC分类号： H03H7/40

CPC分类号： H03H11/1291 ,  H04L25/03885

摘要： A tunable equalizer with a tunable equalizer frequency response is provided. The tunable equalizer includes an amplifier circuit for amplifying input signals and a tunable circuit coupled to the amplifier circuit. The tunable circuit is arranged to provide a zero point in the equalizer frequency response and the zero point is adjusted according to a controllable value. When the controllable value varies according to a uniform offset, the corresponding zero point varies according to a non-uniform offset.

摘要翻译： 提供了具有可调均衡器频率响应的可调均衡器。 可调谐均衡器包括用于放大输入信号的放大器电路和耦合到放大器电路的可调谐电路。 可调电路被设置成在均衡器频率响应中提供零点，并且根据可控值调整零点。 当可控值根据均匀偏移而变化时，相应的零点根据不均匀的偏移而变化。

公开(公告)号：US08848462B2

公开(公告)日：2014-09-30

申请号：US13617394

申请日：2012-09-14

申请人： Yan-Bin Luo ,  Chih-Chien Hung ,  Qui-Ting Chen ,  Shang-Ping Chen

发明人： Yan-Bin Luo ,  Chih-Chien Hung ,  Qui-Ting Chen ,  Shang-Ping Chen

IPC分类号： G11C7/10 ,  G06F13/16 ,  G11C8/06

CPC分类号： G06F13/16 ,  G06F1/3275 ,  G06F13/1668 ,  G11C7/1051 ,  G11C7/1078 ,  G11C8/06 ,  Y02D10/13 ,  Y02D10/14

摘要： A memory controller is provided. The memory controller is powered by first and second power source and includes an input/output pin, a driver circuit, a terminal resistor, and an input buffer. The driver circuit is coupled to the input/output pin and capable of providing to a writing signal to the input/output pin. The terminal resistor is coupled between the input/output pin and the first power source. The input buffer is coupled to the input/output pin and capable of receiving a reading signal from the input/output pin. No terminal resistor is coupled between the input/output pin and the second power source.

摘要翻译： 提供存储器控制器。 存储器控制器由第一和第二电源供电，并且包括输入/​​输出引脚，驱动器电路，终端电阻器和输入缓冲器。 驱动器电路耦合到输入/输出引脚，并且能够向输入/输出引脚提供写入信号。 端子电阻耦合在输入/输出引脚和第一个电源之间。 输入缓冲器耦合到输入/输出引脚，并能够从输入/输出引脚接收读取信号。 输入/输出引脚和第二个电源之间没有端子电阻耦合。

公开(公告)号：US08363710B2

公开(公告)日：2013-01-29

申请号：US12426987

申请日：2009-04-21

申请人： Yan-Bin Luo ,  Qui-Ting Chen

发明人： Yan-Bin Luo ,  Qui-Ting Chen

IPC分类号： H03H7/30

CPC分类号： H03H11/1291 ,  H04L25/03885

摘要： A tunable equalizer with a tunable equalizer frequency response is provided. The tunable equalizer includes an amplifier circuit for amplifying input signals and a tunable circuit coupled to the amplifier circuit. The tunable circuit is arranged to provide a zero point in the equalizer frequency response and the zero point is adjusted according to a controllable value. When the controllable value varies according to a uniform offset, the corresponding zero point varies according to a non-uniform offset.

摘要翻译： 提供了具有可调均衡器频率响应的可调均衡器。 可调谐均衡器包括用于放大输入信号的放大器电路和耦合到放大器电路的可调电路。 可调电路被设置成在均衡器频率响应中提供零点，并且根据可控值调整零点。 当可控值根据均匀偏移而变化时，相应的零点根据不均匀的偏移而变化。

公开(公告)号：US20130088929A1

公开(公告)日：2013-04-11

申请号：US13617394

申请日：2012-09-14

申请人： Yan-Bin LUO ,  Chih-Chien HUNG ,  Qui-Ting CHEN ,  Shang-Ping CHEN

发明人： Yan-Bin LUO ,  Chih-Chien HUNG ,  Qui-Ting CHEN ,  Shang-Ping CHEN

IPC分类号： G11C7/10

CPC分类号： G06F13/16 ,  G06F1/3275 ,  G06F13/1668 ,  G11C7/1051 ,  G11C7/1078 ,  G11C8/06 ,  Y02D10/13 ,  Y02D10/14

摘要： A memory controller is provided. The memory controller is powered by first and second power source and includes an input/output pin, a driver circuit, a terminal resistor, and an input buffer. The driver circuit is coupled to the input/output pin and capable of providing to a writing signal to the input/output pin. The terminal resistor is coupled between the input/output pin and the first power source. The input buffer is coupled to the input/output pin and capable of receiving a reading signal from the input/output pin. No terminal resistor is coupled between the input/output pin and the second power source.

摘要翻译： 提供存储器控制器。 存储器控制器由第一和第二电源供电，并且包括输入/​​输出引脚，驱动器电路，终端电阻器和输入缓冲器。 驱动器电路耦合到输入/输出引脚，并且能够向输入/输出引脚提供写入信号。 端子电阻耦合在输入/输出引脚和第一个电源之间。 输入缓冲器耦合到输入/输出引脚，并能够从输入/输出引脚接收读取信号。 输入/输出引脚和第二个电源之间没有端子电阻耦合。