Network communications circuit, system and method
    1.
    发明授权
    Network communications circuit, system and method 有权
    网络通信电路,系统及方法

    公开(公告)号:US08935450B2

    公开(公告)日:2015-01-13

    申请号:US13234798

    申请日:2011-09-16

    IPC分类号: G06F3/00 G06F13/00 H04L12/40

    摘要: Various exemplary aspects are directed to apparatuses and methods involving switches communicatively-coupled on a bus where one or more of the switches operate to block signals from passing through the switch in a first mode, and to pass signals through the switch in a second mode. A logic circuit is responsive to addressing information received in the first mode, by storing and configuring the apparatus with the address information. The logic circuit ignores address information received in the second mode (e.g., does not reconfigure the apparatus with address information received in the second mode).

    摘要翻译: 各种示例性方面针对涉及通信耦合在总线上的开关的装置和方法,其中一个或多个开关操作以在第一模式中阻止信号通过开关,并且以第二模式传递信号通过开关。 逻辑电路响应于以第一模式接收的寻址信息,通过存储和配置具有地址信息的设备。 逻辑电路忽略在第二模式中接收的地址信息(例如,不重新配置在第二模式中接收的地址信息的装置)。

    NETWORK COMMUNICATIONS CIRCUIT, SYSTEM AND METHOD
    2.
    发明申请
    NETWORK COMMUNICATIONS CIRCUIT, SYSTEM AND METHOD 有权
    网络通信电路,系统和方法

    公开(公告)号:US20130073761A1

    公开(公告)日:2013-03-21

    申请号:US13234798

    申请日:2011-09-16

    IPC分类号: G06F13/40 G06F13/00

    摘要: Various exemplary aspects are directed to apparatuses and methods involving switches communicatively-coupled on a bus where one or more of the switches operate to block signals from passing through the switch in a first mode, and to pass signals through the switch in a second mode. A logic circuit is responsive to addressing information received in the first mode, by storing and configuring the apparatus with the address information. The logic circuit ignores address information received in the second mode (e.g., does not reconfigure the apparatus with address information received in the second mode).

    摘要翻译: 各种示例性方面针对涉及通信耦合在总线上的开关的装置和方法,其中一个或多个开关操作以在第一模式中阻止信号通过开关,并且以第二模式传递信号通过开关。 逻辑电路响应于以第一模式接收的寻址信息,通过存储和配置具有地址信息的设备。 逻辑电路忽略在第二模式中接收的地址信息(例如,不重新配置在第二模式中接收到的地址信息的装置)。