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公开(公告)号：US08659344B2
公开(公告)日：2014-02-25
申请号：US13144337
申请日：2010-01-13
IPC分类号： H03K17/16
CPC分类号： G05F1/565
摘要： A power supply regulator circuit uses a feedback loop to control current through a first output transistor from a power supply input to a regulated power supply output. The first output transistor is included in an integrated circuit. In order to avoid heating of the integrated circuit in excess of an acceptable level due to permanent supply of a high current through the first transistor, current through a second output transistor in parallel with the first transistor, but outside the integrated circuit is raised when it is detected that the current through the first output transistor exceeds a threshold level. The second output transistor outside the integrated circuit serves to take over supply of a part of the power supply current from first output transistor inside integrated circuit, when long term supply of that part from first output transistor would lead to undesirable heating of the integrated circuit. During a limited time interval a first transistor current above the threshold level is acceptable. During this time interval the current through the second output transistor is raised slowly in order to avoid unpredictable stability problems and the generation of excessive power supply noise.
摘要翻译： 电源调节器电路使用反馈回路来控制从电源输入到稳压电源输出的第一输出晶体管的电流。 第一输出晶体管包含在集成电路中。 为了避免由于通过第一晶体管的高电流的永久供应而使集成电路的加热超过可接受的电平，通过与第一晶体管并联的第二输出晶体管，但是当集成电路的外部集成 检测到通过第一输出晶体管的电流超过阈值电平。 集成电路外部的第二输出晶体管用于从集成电路内部的第一输出晶体管接收一部分电源电流，当来自第一输出晶体管的该部分的长期供应将导致集成电路的不期望的加热时。 在有限的时间间隔内，高于阈值电平的第一晶体管电流是可接受的。 在该时间间隔期间，缓慢升高通过第二输出晶体管的电流，以避免不可预测的稳定性问题和产生过大的电源噪声。
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公开(公告)号：US20120091985A1
公开(公告)日：2012-04-19
申请号：US12904719
申请日：2010-10-14
IPC分类号： G05F3/02
CPC分类号： H03K17/6874 , H03K2017/066 , H03K2217/0063
摘要： An output driver circuit is provided. In accordance with various example embodiments, an output driver circuit includes a high-side driver circuit having transistors coupled in anti-series between a power source and an output node, and a low-side driver circuit having transistors coupled in anti-series between the output node and ground. For each transistor, a diode is connected between the source and drain of the transistor, with the diodes of the respective high-side and low-side circuits being arranged to prevent/mitigate the flow of current in opposite directions.
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3.发明授权公开(公告)号：US06949963B2
公开(公告)日：2005-09-27
申请号：US10095348
申请日：2002-03-11
申请人： Clemens Gerhardus Johannes De Haas , Hendrik Boezen , Aloysius Johannes Maria Boomkamp , Gerrit Jan Bollen , Abraham Klaas Van Den Heuvel , Ruurd Anne Visser
发明人： Clemens Gerhardus Johannes De Haas , Hendrik Boezen , Aloysius Johannes Maria Boomkamp , Gerrit Jan Bollen , Abraham Klaas Van Den Heuvel , Ruurd Anne Visser
IPC分类号： H03K17/16 , H03K17/687 , H03K19/0175 , H04L25/02 , H03K3/00
CPC分类号： H04L25/028
摘要： Line driver for a LIN-bus. The line driver has a current source output transistor (T1) for pulling down the LIN-bus wire (LB) to ground (GND). The LIN-bus wire (LB) is connected to a positive supply voltage (VBAT) through a pull-up resistor (R1). The output transistor (T1) is driven by a driver stage (DRV) in response to an input current (J1) at an input node (X). The driver stage has a further resistor (R2) connected between the gate of the output transistor (T1) and a reference terminal (GND), a reference transistor (T2) which has its source connected to the reference terminal (GND) and its drain coupled to the input node (X); the gates of the output transistor (T1) and the reference transistor (T2) are connected to an output (DAO1) of a differential amplifier (DA1) which has an inverting input (DAN1) coupled to a bias voltage source (E2) and a non-inverting input (DAP1) coupled to the input node (X). The further resistor (R2) stage provides a low-impedance path to ground for RF disturbances reaching the gate of the output transistor (T1) through the drain-gate capacitance of the output transistor (T1) and prevents these disturbances from penetrating the driver stage.
摘要翻译： 用于LIN总线的线路驱动器。 线路驱动器具有用于将LIN总线（LB）拉到地（GND）的电流源输出晶体管（T 1）。 LIN总线（LB）通过上拉电阻（R 1）连接到正电源电压（VBAT）。 响应于输入节点（X）处的输入电流（J 1），输出晶体管（T 1）由驱动级（DRV）驱动。 驱动级具有连接在输出晶体管（T 1）的栅极和参考端子（GND）之间的另一个电阻器（R 2），其源极连接到参考端子（GND）的参考晶体管（T 2） 并且其漏极耦合到输入节点（X）; 输出晶体管（T 1）和参考晶体管（T 2）的栅极连接到差分放大器（DA 1）的输出（DAO 1），差分放大器（DA 1）具有耦合到偏置电压源 （E 2）和耦合到输入节点（X）的非反相输入（DAP 1）。 另外的电阻器（R 2）级通过输出晶体管（T 1）的漏极 - 栅极电容为RF输入端到达输出晶体管（T 1）的栅极提供了一个低阻抗路径，并防止这些干扰穿透 司机舞台。
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公开(公告)号：US08987934B2
公开(公告)日：2015-03-24
申请号：US13292181
申请日：2011-11-09
CPC分类号： G05F1/56
摘要： Various exemplary embodiments relate a system for supplying power. The system may include a power source outputting a source voltage, a regulator connected to the power source, and an extension module connected to the power source. The regulator may output a first voltage when the source voltage is above a minimum threshold, and the extension module may output a second voltage when the source voltage falls below the minimum threshold.
摘要翻译： 各种示例性实施例涉及用于供电的系统。 该系统可以包括输出源电压的电源，连接到电源的调节器和连接到电源的扩展模块。 当源电压高于最小阈值时，调节器可以输出第一电压，并且当电源电压下降到最小阈值以下时，扩展模块可以输出第二电压。
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公开(公告)号：US20130113276A1
公开(公告)日：2013-05-09
申请号：US13292181
申请日：2011-11-09
CPC分类号： G05F1/56
摘要： Various exemplary embodiments relate a system for supplying power. The system may include a power source outputting a source voltage, a regulator connected to the power source, and an extension module connected to the power source. The regulator may output a first voltage when the source voltage is above a minimum threshold, and the extension module may output a second voltage when the source voltage falls below the minimum threshold.
摘要翻译： 各种示例性实施例涉及用于供电的系统。 该系统可以包括输出源电压的电源，连接到电源的调节器和连接到电源的扩展模块。 当源电压高于最小阈值时，调节器可以输出第一电压，并且当电源电压下降到最小阈值以下时，扩展模块可以输出第二电压。
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公开(公告)号：US20120092043A1
公开(公告)日：2012-04-19
申请号：US12904844
申请日：2010-10-14
IPC分类号： H03K17/00
CPC分类号： H03K17/6874
摘要： An output driver circuit is provided. In accordance with various example embodiments, an output driver circuit includes a high-side driver circuit having transistors coupled in anti-series between a power source and an output node, and a low-side driver circuit having transistors coupled in anti-series between the output node and ground. For each transistor, a diode is connected between the source and drain of the transistor, with the diodes of the respective high-side and low-side circuits being arranged to prevent/mitigate the flow of current in opposite directions.
摘要翻译： 提供一个输出驱动电路。 根据各种示例实施例，输出驱动器电路包括具有耦合在电源和输出节点之间的反串联的晶体管的高侧驱动器电路，以及具有耦合在串联的晶体管之间的晶体管的低侧驱动器电路 输出节点和地。 对于每个晶体管，二极管连接在晶体管的源极和漏极之间，相应的高侧和低侧电路的二极管布置成防止/减轻相反方向的电流。
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公开(公告)号：US09651967B2
公开(公告)日：2017-05-16
申请号：US13292214
申请日：2011-11-09
摘要： Various exemplary embodiments relate a system and method for supplying power. The system may include an input/output port, a regulator, and a clamp. The regulator may supply power to the input/output port in a first mode, sink current from the input/output port in a second mode, and be disabled in a third mode. The clamp may be disabled in the first and second modes, and may limit the voltage at the input/output port below a first value in the third mode.
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公开(公告)号：US08982527B2
公开(公告)日：2015-03-17
申请号：US12892745
申请日：2010-09-28
CPC分类号： H01H47/32 , F02N11/087 , F02N2200/063 , H01H47/001 , H01H47/002
摘要： A system and method for driving a relay circuit involves driving a relay circuit using a first driver circuit if a voltage of a battery supply for the relay circuit is lower than a voltage threshold and driving the relay circuit using a second driver circuit if the voltage of the battery supply for the relay circuit is higher than the voltage threshold.
摘要翻译： 用于驱动继电器电路的系统和方法涉及如果用于继电器电路的电池电源的电压低于电压阈值，则使用第一驱动电路来驱动继电器电路，并且如果第二驱动电路的电压 继电器电路的电池电源高于电压阈值。
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公开(公告)号：US20130073761A1
公开(公告)日：2013-03-21
申请号：US13234798
申请日：2011-09-16
申请人： Peter Gustaaf Nierop , Clemens Gerhardus Johannes de Haas , Rainer Evers , Franciscus Johannes Klosters
发明人： Peter Gustaaf Nierop , Clemens Gerhardus Johannes de Haas , Rainer Evers , Franciscus Johannes Klosters
CPC分类号： H04L12/40045 , H04L2012/40234
摘要： Various exemplary aspects are directed to apparatuses and methods involving switches communicatively-coupled on a bus where one or more of the switches operate to block signals from passing through the switch in a first mode, and to pass signals through the switch in a second mode. A logic circuit is responsive to addressing information received in the first mode, by storing and configuring the apparatus with the address information. The logic circuit ignores address information received in the second mode (e.g., does not reconfigure the apparatus with address information received in the second mode).
摘要翻译： 各种示例性方面针对涉及通信耦合在总线上的开关的装置和方法，其中一个或多个开关操作以在第一模式中阻止信号通过开关，并且以第二模式传递信号通过开关。 逻辑电路响应于以第一模式接收的寻址信息，通过存储和配置具有地址信息的设备。 逻辑电路忽略在第二模式中接收的地址信息（例如，不重新配置在第二模式中接收到的地址信息的装置）。
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公开(公告)号：US20120081086A1
公开(公告)日：2012-04-05
申请号：US12895202
申请日：2010-09-30
IPC分类号： G05F1/10
CPC分类号： H02M3/158 , H02M2001/0032 , H02M2001/0045 , Y02B70/16
摘要： A power supply circuit and a method for operating a power supply circuit involves selecting a normal operational mode or a pass-through operational mode for a switched mode power supply, in the normal operational mode, converting an input voltage of a power supply circuit to an intermediate voltage using a switching regulator of the switched mode power supply, in the pass-through operational mode, disabling the switching regulator such that the input voltage of the power supply circuit is unchanged by the switching regulator and an electric current consumption of the switching regulator approaches zero, and converting the intermediate voltage or the input voltage of the power supply circuit to an output voltage using a linear voltage regulator.
摘要翻译： 电源电路和用于操作电源电路的方法包括在正常操作模式中选择开关模式电源的正常操作模式或直通操作模式，将电源电路的输入电压转换为 使用开关型电源的开关调节器的中间电压，在通过操作模式下，禁用开关调节器，使得开关调节器的电源电路的输入电压不变，开关稳压器的电流消耗 接近零，并且使用线性电压调节器将电源电路的中间电压或输入电压转换为输出电压。
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