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    Techniques for actively configuring programmable circuits using external memory
    2.
    发明授权
    Techniques for actively configuring programmable circuits using external memory 失效

    公开(公告)号：US07043630B1

    公开(公告)日：2006-05-09

    申请号：US10426163

    申请日：2003-04-28

    申请人： Renxin Xia

    发明人： Renxin Xia

    IPC分类号： G06F15/177

    CPC分类号： G06F9/4411 ,  G06F15/177

    摘要： Techniques for actively configuring a programmable circuit using configuration data stored in an external memory are provided. The programmable circuit attempts to read a device identification code from an external memory device using a read instruction. The programmable circuit then attempts to identify the external memory device by matching the identification code returned from the external memory with a code in a first predefined list. A match indicates that the programmable circuit has hardware that can generate instructions that the memory device can recognize. After the programmable circuit identifies the memory device, the programmable circuit sends instructions to the external memory device according to a predefined protocol understood by the memory device. The programmable circuit can also compare a device identification code for a particular memory device with a second list of identification codes to determine whether a user wants the programmable circuit to support that memory device.

    Method and system for partial reconfiguration simulation
    5.
    发明授权
    Method and system for partial reconfiguration simulation 有权
    部分重构模拟方法与系统

    公开(公告)号：US08751998B2

    公开(公告)日：2014-06-10

    申请号：US13369218

    申请日：2012-02-08

    申请人： David W. Mendel ,  Marwan A. Khalaf ,  Renxin Xia

    发明人： David W. Mendel ,  Marwan A. Khalaf ,  Renxin Xia

    IPC分类号： G06F11/22 ,  G06F17/50

    CPC分类号： G06F17/5054 ,  G06F17/5022

    摘要： Disclosed is a method of simulating partial reconfiguration of a programmable logic device (PLD). A wrapper module is incorporated into a logic description that may be implemented in a PLD. The wrapper module represents a first logic design. In response to receiving a parameter, the wrapper module changes to represent a second logic design. According to various embodiments, the logic description is a simulatable source file. The simulatable source file is a source file that is used by a simulation program to simulate partial reconfiguration of the logic design. The wrapper module of the simulatable source file receives a run-time parameter. In various embodiments, the logic description is a synthesizable source file. The synthesizable source file is a source file that is used by a synthesis tool to compile the source file into hardware. The wrapper module of the synthesizable source receives a compile-time parameter.

    摘要翻译： 公开了一种模拟可编程逻辑器件（PLD）的部分重新配置的方法。 封装模块被并入到可以在PLD中实现的逻辑描述中。 封装模块代表第一逻辑设计。 响应于接收参数，包装器模块改变以表示第二逻辑设计。 根据各种实施例，逻辑描述是可模拟的源文件。 可模拟的源文件是由仿真程序用于模拟逻辑设计的部分重新配置的源文件。 可模拟源文件的包装器模块接收运行时参数。 在各种实施例中，逻辑描述是可合成的源文件。 可合成的源文件是由合成工具用来将源文件编译成硬件的源文件。 可合成源的包装器模块接收编译时参数。

    METHOD AND SYSTEM FOR PARTIAL RECONFIGURATION SIMULATION
    7.
    发明申请
    METHOD AND SYSTEM FOR PARTIAL RECONFIGURATION SIMULATION 有权
    用于部分重构模拟的方法和系统

    公开(公告)号：US20130007687A1

    公开(公告)日：2013-01-03

    申请号：US13369218

    申请日：2012-02-08

    申请人： David W. Mendel ,  Marwan A. Khalaf ,  Renxin Xia

    发明人： David W. Mendel ,  Marwan A. Khalaf ,  Renxin Xia

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5054 ,  G06F17/5022

    摘要： Disclosed is a method of simulating partial reconfiguration of a programmable logic device (PLD). A wrapper module is incorporated into a logic description that may be implemented in a PLD. The wrapper module represents a first logic design. In response to receiving a parameter, the wrapper module changes to represent a second logic design. According to various embodiments, the logic description is a simulatable source file. The simulatable source file is a source file that is used by a simulation program to simulate partial reconfiguration of the logic design. The wrapper module of the simulatable source file receives a run-time parameter. In various embodiments, the logic description is a synthesizable source file. The synthesizable source file is a source file that is used by a synthesis tool to compile the source file into hardware. The wrapper module of the synthesizable source receives a compile-time parameter.

    摘要翻译： 公开了一种模拟可编程逻辑器件（PLD）的部分重新配置的方法。 封装模块被并入到可以在PLD中实现的逻辑描述中。 封装模块代表第一逻辑设计。 响应于接收参数，包装器模块改变以表示第二逻辑设计。 根据各种实施例，逻辑描述是可模拟的源文件。 可模拟的源文件是由仿真程序用于模拟逻辑设计的部分重新配置的源文件。 可模拟源文件的包装器模块接收运行时参数。 在各种实施例中，逻辑描述是可合成的源文件。 可合成的源文件是由合成工具用来将源文件编译成硬件的源文件。 可合成源的包装器模块接收编译时参数。

    Techniques for actively configuring programmable circuits using external memory
    8.
    发明授权
    Techniques for actively configuring programmable circuits using external memory 有权
    使用外部存储器主动配置可编程电路的技术

    公开(公告)号：US07490233B1

    公开(公告)日：2009-02-10

    申请号：US11370654

    申请日：2006-03-07

    申请人： Renxin Xia

    发明人： Renxin Xia

    IPC分类号： G06F15/177

    CPC分类号： G06F9/4411 ,  G06F15/177

    摘要： Techniques for actively configuring a programmable circuit using configuration data stored in an external memory are provided. The programmable circuit attempts to read a device identification code from an external memory device using a read instruction. The programmable circuit then attempts to identify the external memory device by matching the identification code returned from the external memory with a code in a first predefined list. A match indicates that the programmable circuit has hardware that can generate instructions that the memory device can recognize. After the programmable circuit identifies the memory device, the programmable circuit sends instructions to the external memory device according to a predefined protocol understood by the memory device. The programmable circuit can also compare a device identification code for a particular memory device with a second list of identification codes to determine whether a user wants the programmable circuit to support that memory device.

    摘要翻译： 提供了使用存储在外部存储器中的配置数据来主动配置可编程电路的技术。 可编程电路尝试使用读取指令从外部存储器件读取器件识别码。 然后，可编程电路通过将从外部存储器返回的识别码与第一预定义列表中的代码相匹配来尝试识别外部存储器件。 匹配指示可编程电路具有能够产生存储器件可识别的指令的硬件。 在可编程电路识别存储器件之后，可编程电路根据存储器件理解的预定义协议向外部存储器件发送指令。 可编程电路还可以将特定存储器件的器件识别码与标识码的第二列表进行比较，以确定用户是否希望可编程电路支持该存储器件。

    Systems and methods for flexibly configuring a programmable logic device
    9.
    发明授权
    Systems and methods for flexibly configuring a programmable logic device 有权
    灵活配置可编程逻辑器件的系统和方法

    公开(公告)号：US08664975B1

    公开(公告)日：2014-03-04

    申请号：US13085679

    申请日：2011-04-13

    申请人： Yi Gao ,  Renxin Xia ,  Juin-Yeu Lu

    发明人： Yi Gao ,  Renxin Xia ,  Juin-Yeu Lu

    IPC分类号： G06F7/38

    CPC分类号： H03K19/17752 ,  G06F17/5054

    摘要： Systems and methods for flexibly configuring one or more intellectual property (IP) blocks of a programmable logic device are described. The methods include configuring and operating a first portion of the programmable logic device before configuring a remaining portion of the programmable logic device. By operating the first portion before configuring the remaining portions, various timing constraints including power-up timing constraints can be met by the programmable logic device.

    摘要翻译： 描述了用于灵活地配置可编程逻辑设备的一个或多个知识产权（IP）块的系统和方法。 所述方法包括在配置可编程逻辑器件的剩余部分之前配置和操作可编程逻辑器件的第一部分。 通过在配置剩余部分之前操作第一部分，可由可编程逻辑器件满足包括上电时序约束在内的各种定时约束。