公开(公告)号：US4797810A

公开(公告)日：1989-01-10

申请号：US878551

申请日：1986-06-26

申请人： Timothy J. McEntee ,  Robert W. Bloemer ,  Donald W. Oxley ,  Satish M. Thatte

发明人： Timothy J. McEntee ,  Robert W. Bloemer ,  Donald W. Oxley ,  Satish M. Thatte

IPC分类号： G06F12/08 ,  G06F12/00 ,  G06F12/02 ,  G06F12/12 ,  G06F11/00

CPC分类号： G06F12/0276 ,  Y10S707/99957

摘要： An incremental garbage collector for use in conjunction with a virtual memory, operates on selected generations of an area upon objects which are contained in a semispace, oldspace or newspace, and during the garbage collection process, all accessible objects are copied from the oldspace to the newspace. The garbage collection process occurs in four phases. In the "flip" phase oldspace and newspace of each generation are exchanged. In the "trace" phase, the pointers which are part of a root set of the generation being collected are traced and all oldspace objects referenced by the pointers are copied to newspace, and the pointers in the root set are updated. All copied objects are then "scavenged" to update any pointers in the cells of the copied objects, and to copy to newspace all oldspace objects referenced by those pointers. Finally a "cleaning oldspace" phase is performed as a low-priority background process to purge the entries for the virtual pages on which "obsolete" pointers reside.

摘要翻译： 与虚拟内存一起使用的增量垃圾收集器，对包含在半空间，旧空间或新空间中的对象的区域的选定世代进行操作，并且在垃圾收集过程中，所有可访问对象都从旧空间复制到 新空间 垃圾收集过程分四个阶段进行。 在“翻转”阶段，每一代的旧空间和新空间被交换。 在“跟踪”阶段中，跟踪所收集生成的根组的一部分的指针，并将指针引用的所有旧空间对象复制到新空间，并更新根集中的指针。 所有复制的对象然后被“清理”以更新复制对象的单元格中的任何指针，并将这些指针引用的所有旧空间对象复制到新空间。 最后，执行“清理旧空间”阶段作为低优先级后台进程，以清除“过时”指针所在的虚拟页面的条目。

公开(公告)号：US08156276B2

公开(公告)日：2012-04-10

申请号：US11161369

申请日：2005-08-01

申请人： Stephen L. Morein ,  Robert W. Bloemer

发明人： Stephen L. Morein ,  Robert W. Bloemer

IPC分类号： G06F13/14

CPC分类号： G06F13/1615 ,  G06F13/1684 ,  G11C7/1072

摘要： A method and apparatus for data transfer includes receiving a first data packet across a first bi-directional bus and receiving a second data packet across a second bi-directional bus. Next, the first data packet is written to a first register operably coupled to the first bi-directional bus and the second bi-directional bus. The second data packet is written to a second register operably coupled to the first bi-directional bus and the second bi-directional bus. The second data packet is then transferred across the first bi-directional bus and the first data packet is transferred across the second bi-directional bus, thereby providing data transfer across a plurality of bi-directional buses and providing for data to be transferred across those buses to be stored at an intermediate register so that the data may be transferred in the next clock cycle, overcoming any latency requirements.

摘要翻译： 一种用于数据传输的方法和装置包括跨越第一双向总线接收第一数据分组并且跨越第二双向总线接收第二数据分组。 接下来，将第一数据分组写入可操作地耦合到第一双向总线和第二双向总线的第一寄存器。 第二数据分组被写入可操作地耦合到第一双向总线和第二双向总线的第二寄存器。 然后，第二数据分组在第一双向总线上传输，并且第一数据分组跨第二个双向总线传输，从而提供跨多个双向总线的数据传输，并提供跨数据传输的数据 要存储在中间寄存器中的总线，以便可以在下一个时钟周期中传输数据，克服任何延迟要求。

公开(公告)号：US4615029A

公开(公告)日：1986-09-30

申请号：US677153

申请日：1984-12-03

申请人： Kwok D. Hu ,  Robert W. Bloemer

发明人： Kwok D. Hu ,  Robert W. Bloemer

IPC分类号： H04L12/423 ,  H04J3/24

CPC分类号： H04L12/423

摘要： A ring network is comprised of slave devices (96) (98), (100) and (102) that are interconnected on a ring network. The slave device (96) is interfaced with a test/maintenance controller (120) through a serial transmission line (106). The slave device (96) is interfaced with the slave device (98) through a serial transmission line (108). The slave device (98) is interfaced with the slave device (100) through a line (110) and the slave device (102) is interfaced with the slave device (100) through a line (112) with the slave device (102) being interfaced with the controller (120) through a line (114). A clock is generated by the controller (120) and transmitted to each of the slave devices through a node (1188) to provide an asynchronous clock with respect thereto. Each of the slave devices has an internal synchronizing circuit (130) for synchronizing the internal operation of the devices with respect to the controller (120). In addition, a data line select circuit (121) is provided to determine direction of transmission on the bus. The controller selects the position of the devices on the bus by transmitting a unique identifier which is recognized by a slave device as a select signal therefor as a function of its relative position on the bus with respect to the point from which the data was transmitted. The controller (120) can transmit from either direction on the bus and receive data from either direction.

摘要翻译： 环网由在环网上互连的从设备（96）（98），（100）和（102）组成。 从设备（96）通过串行传输线路（106）与测试/维护控制器（120）接口。 从设备（96）通过串行传输线（108）与从设备（98）接口。 从设备（98）通过线路（110）与从设备（100）接口，从设备（102）通过与从设备（102）的线路（112）与从设备（100）接口， 通过线路（114）与控制器（120）接口。 时钟由控制器（120）产生，并通过节点（1188）发送到每个从设备，以提供相对于其的异步时钟。 每个从设备具有用于使设备相对于控制器（120）的内部操作同步的内部同步电路（130）。 此外，提供数据线选择电路（121）以确定总线上的传输方向。 控制器通过发送由从设备识别的唯一标识符作为其在总线上相对于数据发送点的相对位置的函数来选择总线上的设备的位置，作为其选择信号。 控制器（120）可以从总线上的任一个方向发送并从任一方向接收数据。

公开(公告)号：US08386687B2

公开(公告)日：2013-02-26

申请号：US13398987

申请日：2012-02-17

申请人： Stephen L. Morein ,  Robert W. Bloemer

发明人： Stephen L. Morein ,  Robert W. Bloemer

IPC分类号： G06F13/14

CPC分类号： G06F13/1615 ,  G06F13/1684 ,  G11C7/1072

摘要： A method and apparatus for data transfer includes receiving a first data packet across a first bi-directional bus and receiving a second data packet across a second bi-directional bus. Next, the first data packet is written to a first register operably coupled to the first bi-directional bus and the second bi-directional bus. The second data packet is written to a second register operably coupled to the first bi-directional bus and the second bi-directional bus. The second data packet is then transferred across the first bi-directional bus and the first data packet is transferred across the second bi-directional bus, thereby providing data transfer across a plurality of bi-directional buses and providing for data to be transferred across those buses to be stored at an intermediate register so that the data may be transferred in the next clock cycle, overcoming any latency requirements.

摘要翻译： 一种用于数据传输的方法和装置包括跨越第一双向总线接收第一数据分组并且跨越第二双向总线接收第二数据分组。 接下来，将第一数据分组写入可操作地耦合到第一双向总线和第二双向总线的第一寄存器。 第二数据分组被写入可操作地耦合到第一双向总线和第二双向总线的第二寄存器。 然后，第二数据分组在第一双向总线上传输，并且第一数据分组跨第二个双向总线传输，从而提供跨多个双向总线的数据传输，并提供跨数据传输的数据 要存储在中间寄存器中的总线，以便可以在下一个时钟周期中传输数据，克服任何延迟要求。

公开(公告)号：US20120159093A1

公开(公告)日：2012-06-21

申请号：US13398987

申请日：2012-02-17

申请人： Stephen L. Morein ,  Robert W. Bloemer

发明人： Stephen L. Morein ,  Robert W. Bloemer

IPC分类号： G06F12/00 ,  G06F13/14

CPC分类号： G06F13/1615 ,  G06F13/1684 ,  G11C7/1072

摘要： A method and apparatus for data transfer includes receiving a first data packet across a first bi-directional bus and receiving a second data packet across a second bi-directional bus. Next, the first data packet is written to a first register operably coupled to the first bi-directional bus and the second bi-directional bus. The second data packet is written to a second register operably coupled to the first bi-directional bus and the second bi-directional bus. The second data packet is then transferred across the first bi-directional bus and the first data packet is transferred across the second bi-directional bus, thereby providing data transfer across a plurality of bi-directional buses and providing for data to be transferred across those buses to be stored at an intermediate register so that the data may be transferred in the next clock cycle, overcoming any latency requirements.

摘要翻译： 一种用于数据传输的方法和装置包括跨越第一双向总线接收第一数据分组并且跨越第二双向总线接收第二数据分组。 接下来，将第一数据分组写入可操作地耦合到第一双向总线和第二双向总线的第一寄存器。 第二数据分组被写入可操作地耦合到第一双向总线和第二双向总线的第二寄存器。 然后，第二数据分组在第一双向总线上传输，并且第一数据分组跨第二个双向总线传输，从而提供跨多个双向总线的数据传输，并提供跨数据传输的数据 要存储在中间寄存器中的总线，以便可以在下一个时钟周期中传输数据，克服任何延迟要求。