Buffer controller, codec and methods for use therewith
    1.
    发明授权
    Buffer controller, codec and methods for use therewith 有权
    缓冲控制器,编解码器和与其一起使用的方法

    公开(公告)号:US09015375B2

    公开(公告)日:2015-04-21

    申请号:US11402648

    申请日:2006-04-11

    IPC分类号: G06F3/00 G06F5/10 G06F5/14

    摘要: A buffer controller includes a first write pointer generation module for generating a first write pointer that points to a first sequence of write locations in a buffer memory, that directs an input module to store a sequence of samples of a real-time signal in a buffer memory. A read pointer generation module generates a plurality of read pointers for a corresponding plurality of output modules, wherein each of the plurality of read pointers points to a sequence of read locations in the buffer memory, in a buffer order, that contain the sequence of samples.

    摘要翻译: 缓冲器控制器包括:第一写入指针生成模块,用于产生指向缓冲存储器中的第一写入位置序列的第一写入指针,其指示输入模块将实时信号的采样序列存储在缓冲器中 记忆。 读指针生成模块为相应的多个输出模块生成多个读指针,其中多个读指针中的每一个指针以缓冲器顺序指向缓冲存储器中的读取位置的序列,其中包含采样序列 。