Interface comprising message and protocol processors for interfacing
digital data with a bus network
    1.
    发明授权
    Interface comprising message and protocol processors for interfacing digital data with a bus network 失效
    接口包括用于将数字数据与总线网络进行接口的消息和协议处理器

    公开(公告)号:US4858112A

    公开(公告)日:1989-08-15

    申请号:US809893

    申请日:1985-12-17

    摘要: A network interface equipment for a bus network employs separate processors and random-access memories for handling bus-protocol and data portions of a data packet. Each processor has access to a separate random-access memory to and from which it moves data. The random-access memories are multiple-ported to permit access by more than one requester with a logic arbitrator to resolve conflicts. A status random-access memory provides communication between the two processors.

    摘要翻译: 用于总线网络的网络接口设备采用单独的处理器和随机存取存储器来处理数据分组的总线协议和数据部分。 每个处理器都可以访问一个单独的随机存取存储器,用于移动数据。 随机存取存储器是多端口的,允许多个请求者使用逻辑仲裁器访问以解决冲突。 状态随机存取存储器提供两个处理器之间的通信。

    Real-time cursor generator
    2.
    发明授权
    Real-time cursor generator 失效
    实时光标发生器

    公开(公告)号:US4454507A

    公开(公告)日:1984-06-12

    申请号:US336751

    申请日:1982-01-04

    CPC分类号: G09G5/42 G09G5/08

    摘要: A system for writing cursors on a raster scanned television screen that uses the microprocessor in a display controller to produce blocks of data defining the parameters of vectors that compose the cursor. The blocks are put in a first-in first-out memory during a vertical blanking inerval or during active picture time. Each block specifies where writing of a cursor segment is to start and stop on a horizontal scan line and it also specifies a repeat count that indicates the number of lines on which the segment is to be written. Each block contains a delta value to indicate how much, if any each segment is to be displaced left or right from line to line so vertical and angulated vertical vectors can be produced. The blocks are read out of the memory consecutively by a circuit that converts the segment start and stop data to pixel counts. Pixel counters determine the writing start and stop points. When the number of horizontal lines on which segments are written equals the repeat count, the next block is processed.

    摘要翻译: 用于在光栅扫描的电视屏幕上写入光标的系统,其使用显示控制器中的微处理器产生定义组成光标的向量参数的数据块。 在垂直消隐异常或激活的图像时间期间,这些块被置于先进先出的存储器中。 每个块指定在水平扫描行上开始和停止光标段的写入位置,并且还指定重复计数,该重复计数指示段要写入的行数。 每个块包含一个增量值,用于指示多少(如果有的话)每个段要从一行到另一个位移左或右,因此可以产生垂直和垂直的垂直向量。 通过将段开始和停止数据转换为像素数的电路连续地从存储器中读出块。 像素计数器确定写入起点和停止点。 当写入片段的水平线数等于重复计数时,处理下一个块。

    Digital fluorographic processor control
    3.
    发明授权
    Digital fluorographic processor control 失效
    数字荧光处理器控制

    公开(公告)号:US4449195A

    公开(公告)日:1984-05-15

    申请号:US321307

    申请日:1981-11-13

    CPC分类号: G06T5/50 H04N5/32

    摘要: A method of controlling a digital video processor in a digital fluorography system wherein the electronic components of the processor are variously configured to perform math functions and manipulations on digital image data obtained in connection with carrying out x-ray examination procedures and the images are displayed on a television monitor or recorded. A system controller sends a complete recipe for a procedure to the memory of a microprocessor based CPU that controls the video processor. The latter CPU interprets the instructions and effects configurations and reconfigurations in the data paths of the video processor during television vertical blanking intervals.

    摘要翻译: 一种在数字荧光成像系统中控制数字视频处理器的方法,其中处理器的电子部件被不同地配置成对与执行X射线检查程序相关的数字图像数据执行数学函数和操作,并且将图像显示在 电视监视器或录像。 系统控制器将程序的完整配方发送到控制视频处理器的基于微处理器的CPU的存储器。 后一个CPU在电视垂直消隐间隔期间解释视频处理器的数据路径中的指令和效果配置和重新配置。