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公开(公告)号：US08441874B2
公开(公告)日：2013-05-14
申请号：US12979757
申请日：2010-12-28
IPC分类号： G11C7/00
CPC分类号： G11C7/227 , G11C8/16 , G11C11/412 , G11C11/413
摘要： A memory circuit includes a memory cell configured to be re-writable. A write enable circuit is configured to enable writing a signal via a pair of bit lines to the memory cell depending on a write signal. A charge supply circuit is configured to supply a charge to at least one of the pair of bit lines. A charge supply controller is configured to control the charge supply circuit to disable the supply of charge and couple the write enable circuit to at least one of the pair of bit lines after a first determined period following the reception of the write signal.
摘要翻译： 存储电路包括被配置为可重写的存储单元。 写入使能电路被配置为使得能够根据写入信号经由一对位线将信号写入存储器单元。 电荷供给电路被配置为向所述一对位线中的至少一个提供电荷。 充电供给控制器被配置为控制充电供给电路以禁止电荷供应，并且在接收到写入信号之后的第一确定周期之后将写入使能电路耦合到该对位线中的至少一个位线。
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公开(公告)号：US20120163110A1
公开(公告)日：2012-06-28
申请号：US12979757
申请日：2010-12-28
IPC分类号： G11C7/00
CPC分类号： G11C7/227 , G11C8/16 , G11C11/412 , G11C11/413
摘要： A memory circuit includes a memory cell configured to be re-writable. A write enable circuit is configured to enable writing a signal via a pair of bit lines to the memory cell depending on a write signal. A charge supply circuit is configured to supply a charge to at least one of the pair of bit lines. A charge supply controller is configured to control the charge supply circuit to disable the supply of charge and couple the write enable circuit to at least one of the pair of bit lines after a first determined period following the reception of the write signal.
摘要翻译： 存储电路包括被配置为可重写的存储单元。 写入使能电路被配置为使得能够根据写入信号经由一对位线将信号写入存储器单元。 电荷供给电路被配置为向所述一对位线中的至少一个提供电荷。 充电供给控制器被配置为控制充电供给电路以禁止电荷供应，并且在接收到写入信号之后的第一确定周期之后将写入使能电路耦合到该对位线中的至少一个位线。
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公开(公告)号：US08411518B2
公开(公告)日：2013-04-02
申请号：US12981031
申请日：2010-12-29
IPC分类号： G11C7/00
CPC分类号： G11C7/1096 , G11C5/147 , G11C7/04 , G11C11/413
摘要： A memory circuit includes a memory cell configured to be re-writable. A write enable circuit is configured to enable writing a signal via a pair of bit lines to the memory cell depending on a write signal. A charge supply circuit is configured to supply a charge to at least one of the pair of bit lines. A charge supply controller is configured to control the charge supply circuit to supply the charge dependent on at least one of the temperature of the memory circuit and the potential difference supply of the memory circuit.
摘要翻译： 存储电路包括被配置为可重写的存储单元。 写入使能电路被配置为使得能够根据写入信号经由一对位线将信号写入存储器单元。 电荷供给电路被配置为向所述一对位线中的至少一个提供电荷。 电荷供给控制器被配置为控制充电电路根据存储电路的温度和存储电路的电位差供给中的至少一个来提供电荷。
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公开(公告)号：US20120170391A1
公开(公告)日：2012-07-05
申请号：US12981031
申请日：2010-12-29
IPC分类号： G11C7/00
CPC分类号： G11C7/1096 , G11C5/147 , G11C7/04 , G11C11/413
摘要： A memory circuit includes a memory cell configured to be re-writable. A write enable circuit is configured to enable writing a signal via a pair of bit lines to the memory cell depending on a write signal. A charge supply circuit is configured to supply a charge to at least one of the pair of bit lines. A charge supply controller is configured to control the charge supply circuit to supply the charge dependent on at least one of the temperature of the memory circuit and the potential difference supply of the memory circuit.
摘要翻译： 存储电路包括被配置为可重写的存储单元。 写入使能电路被配置为使得能够根据写入信号经由一对位线将信号写入存储器单元。 电荷供给电路被配置为向所述一对位线中的至少一个提供电荷。 电荷供给控制器被配置为控制充电电路根据存储电路的温度和存储电路的电位差供给中的至少一个来提供电荷。
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