公开(公告)号：US08956919B2

公开(公告)日：2015-02-17

申请号：US13142172

申请日：2009-12-23

申请人： Hyun A. Chun ,  Jae Bong Choi ,  Sung Won Lee ,  Sung Wuk Ryu ,  Hyuk Soo Lee ,  Sai Ran Eom

发明人： Hyun A. Chun ,  Jae Bong Choi ,  Sung Won Lee ,  Sung Wuk Ryu ,  Hyuk Soo Lee ,  Sai Ran Eom

IPC分类号： H01L21/00 ,  H01L23/495 ,  H01L21/48 ,  H01L23/00

CPC分类号： H01L21/4832 ,  H01L23/49582 ,  H01L24/29 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01067 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/01028 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention relates to a multi-row leadframe for semiconductor packaging, characterized by: forming a plating pattern on a leadframe material (first step); forming a protective pattern on the plating pattern (second step); and forming a nano pattern by using the protective pattern as a mask (third step), whereby a protective pattern is formed on an upper surface of a plating pattern to increase reliability of a product by preventing damage to a plating layer caused by etching solution during pattern formation of leadframe and to thereby solve the problem of using the plating layer as an etching mask.

摘要翻译： 本发明涉及一种用于半导体封装的多列引线框，其特征在于：在引线框架材料上形成电镀图案（第一步骤）; 在电镀图案上形成保护图案（第二工序）; 并且通过使用保护图案作为掩模形成纳米图案（第三步骤），由此在电镀图案的上表面上形成保护图案，以通过防止由蚀刻溶液导致的镀层损伤而提高产品的可靠性 引线框架的图案形成，从而解决了使用镀层作为蚀刻掩模的问题。

公开(公告)号：US20120038036A1

公开(公告)日：2012-02-16

申请号：US13142172

申请日：2009-12-23

申请人： Hyun A. Chun ,  Jae Bong Choi ,  Sung Won Lee ,  Sung Wuk Ryu ,  Hyuk Soo Lee ,  Sai Ran Eom

发明人： Hyun A. Chun ,  Jae Bong Choi ,  Sung Won Lee ,  Sung Wuk Ryu ,  Hyuk Soo Lee ,  Sai Ran Eom

IPC分类号： H01L23/495 ,  G03F7/20 ,  H01L21/60

CPC分类号： H01L21/4832 ,  H01L23/49582 ,  H01L24/29 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01067 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/01028 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention relates to a multi-row leadframe for semiconductor packaging, characterized by: forming a plating pattern on a leadframe material (first step); forming a protective pattern on the plating pattern (second step); and forming a nano pattern by using the protective pattern as a mask (third step), whereby a protective pattern is formed on an upper surface of a plating pattern to increase reliability of a product by preventing damage to a plating layer caused by etching solution during pattern formation of leadframe and to thereby solve the problem of using the plating layer as an etching mask.

摘要翻译： 本发明涉及一种用于半导体封装的多列引线框，其特征在于：在引线框架材料上形成电镀图案（第一步骤）; 在电镀图案上形成保护图案（第二工序）; 并且通过使用保护图案作为掩模形成纳米图案（第三步骤），由此在电镀图案的上表面上形成保护图案，以通过防止由蚀刻溶液导致的镀层损伤而提高产品的可靠性 引线框架的图案形成，从而解决了使用镀层作为蚀刻掩模的问题。

公开(公告)号：US08658471B2

公开(公告)日：2014-02-25

申请号：US13142172

申请日：2009-12-23

申请人： Hyun A. Chun ,  Jae Bong Choi ,  Sung Won Lee ,  Sung Wuk Ryu ,  Hyuk Soo Lee ,  Sai Ran Eom

发明人： Hyun A. Chun ,  Jae Bong Choi ,  Sung Won Lee ,  Sung Wuk Ryu ,  Hyuk Soo Lee ,  Sai Ran Eom

IPC分类号： H01L21/00 ,  H01L23/495

摘要： The present invention relates to a multi-row leadframe for semiconductor packaging, characterized by: forming a plating pattern on a leadframe material (first step); forming a protective pattern on the plating pattern (second step); and forming a nano pattern by using the protective pattern as a mask (third step), whereby a protective pattern is formed on an upper surface of a plating pattern to increase reliability of a product by preventing damage to a plating layer caused by etching solution during pattern formation of leadframe and to thereby solve the problem of using the plating layer as an etching mask.