Optimizing exit latency from an active power management state
    1.
    发明授权
    Optimizing exit latency from an active power management state 有权
    从有功电源管理状态优化退出延迟

    公开(公告)号:US07178045B2

    公开(公告)日:2007-02-13

    申请号:US10749619

    申请日:2003-12-30

    IPC分类号: G06F1/26 G06F1/32

    摘要: A transmitting device and a receiving device are coupled together via an interconnect. An electrical idle ordered set is received at the receiving device power management unit after having been transmitted by the transmitting device and received at the input pins of the receiving device and moving through the receiver logic pipeline. At the time the electrical idle ordered set has been recognized at the end of the receiver logic pipeline, the power management unit checks for activity on the interconnect. If there is no activity on the interconnect, then the power management unit causes the receiving device to enter a low power state where the receiver circuitry (input buffers) is turned off. If there is activity on the interconnect when the electrical idle ordered set is received at the power management unit, then the power management unit does not cause the receiver circuitry to be turned off.

    摘要翻译: 发送装置和接收装置通过互连耦合在一起。 在接收设备电源管理单元已经被发送设备发送并在接收设备的输入引脚处接收并且通过接收机逻辑管线移动之后,接收到电气空闲有序集合。 在接收机逻辑流水线末端已经识别到电气空闲有序集的时候,电源管理单元检查互连上的活动。 如果互连上没有活动,则电源管理单元使接收设备进入接收机电路(输入缓冲器)关闭的低功率状态。 如果在电力管理单元处接收到电气空闲有序集合时在互连上存在活动,则电源管理单元不会使接收器电路关闭。