Method of fabricating BICMOS field effect transistors
    1.
    发明授权
    Method of fabricating BICMOS field effect transistors 失效
    制造BICMOS场效应晶体管的方法

    公开(公告)号:US5194396A

    公开(公告)日:1993-03-16

    申请号:US763171

    申请日:1991-09-20

    CPC分类号: H01L21/70 Y10S148/009

    摘要: There is disclosed a method of fabricating BiCMOS semiconductor devices. External metal lines are not used for connecting the NPN bipolar device and NMOS device, or NPN bipolar device and PMOS device. In this case, the collector and base of the bipolar device are respectively in common with the drain and source of the CMOS. The bipolar transistor is in common with the bulk region of the CMOS, so that the diffusion layer is commonly used in the NPN-PMOS pair, and the diffusion layers of the connecting part are connected together in the NPN-PMOS pair. A metal line is connected to the junction of the diffusion layers, thus decreasing the connecting area of the metal line. Hence, the integrability of the chip is increased, and the metal connection causes a reduction of the RC delay time, thus improving the operational speed.

    摘要翻译: 公开了一种制造BiCMOS半导体器件的方法。 外部金属线不用于连接NPN双极器件和NMOS器件,或NPN双极器件和PMOS器件。 在这种情况下,双极器件的集电极和基极分别与CMOS的漏极和源极共同。 双极晶体管与CMOS的体区共同,使得扩散层通常用于NPN-PMOS对,并且连接部分的扩散层在NPN-PMOS对中连接在一起。 金属线连接到扩散层的结,从而减少金属线的连接面积。 因此,芯片的可集成度增加,金属连接导致RC延迟时间的减少,从而提高了操作速度。