公开(公告)号：US20120249177A1

公开(公告)日：2012-10-04

申请号：US13403432

申请日：2012-02-23

Applicant: Gui-Heum CHOI ,  Doo-Seob KIM ,  Jong-An LEE ,  Young-Gil LEE ,  Seoung-Su HA ,  Seung-Hee LEE

Inventor： Gui-Heum CHOI ,  Doo-Seob KIM ,  Jong-An LEE ,  Young-Gil LEE ,  Seoung-Su HA ,  Seung-Hee LEE

IPC: G01R31/26 ,  G01R31/00

CPC classification number: G01R31/2893

Abstract: A handler tray may include a tray body and a socket. The tray body may be configured to receive an object. The tray body with the object may be transferred to a test board. The tray body may be selectively interposed between the object and the test board to supply a test current from the test board to external terminals of the object. The socket may be formed on the tray body. The socket may electrically make contact with the external terminals of the object. Thus, a pick-up robot and an insert may be unnecessary, so that a test system and method of testing the object may have an optimally available space.

Abstract translation: 处理器托盘可以包括托盘主体和插座。 托盘主体可以被配置为接收对象。 具有物体的托盘主体可以被传送到测试板。 托盘主体可以选择性地插入到对象和测试板之间，以将来自测试板的测试电流提供给对象的外部端子。 插座可以形成在托盘主体上。 插座可以与物体的外部端子电接触。 因此，可能不需要拾取机器人和插入件，使得测试系统和测试对象的方法可以具有最佳可用空间。

公开(公告)号：US20080113524A1

公开(公告)日：2008-05-15

申请号：US11940044

申请日：2007-11-14

Applicant: Seoung-Su HA ,  Jin-Won KANG ,  Jung-Hyeon KIM ,  Se-Jun YU

Inventor： Seoung-Su HA ,  Jin-Won KANG ,  Jung-Hyeon KIM ,  Se-Jun YU

IPC: H01R13/20

CPC classification number: G01R1/0466 ,  G01R1/0483 ,  H01R11/30 ,  H01R12/7076 ,  H01R13/2407

Abstract: Example embodiments of the present invention include a socket for testing a semiconductor package. The socket comprises a body having a through hole. A lower magnet is disposed in a lower region of the through hole, and a first type magnetic pole of the lower magnet is directed upward. An upper magnet is disposed in an upper region of the through hole, wherein the first type magnetic pole of the upper magnet is directed toward the lower magnet. The upper and lower magnets are structured to absorb a shock wave which is generated when the semiconductor package is arranged for testing. A conductive medium is disposed between the lower magnet and the upper magnet to electrically couple contactors of the semiconductor package to a base substrate of the socket.

Abstract translation: 本发明的示例性实施例包括用于测试半导体封装的插座。 插座包括具有通孔的主体。 下磁铁配置在通孔的下部区域，下磁铁的第一型磁极向上方。 上磁体设置在通孔的上部区域中，其中上磁体的第一型磁极指向下磁体。 上磁铁和下磁体被构造成吸收当半导体封装被布置用于测试时产生的冲击波。 导电介质设置在下磁体和上磁体之间，以将半导体封装的接触器电耦合到插座的基底。

公开(公告)号：US07419378B2

公开(公告)日：2008-09-02

申请号：US11940044

申请日：2007-11-14

Applicant: Seoung-Su Ha ,  Jin-Won Kang ,  Jung-Hyeon Kim ,  Se-Jun Yu

Inventor： Seoung-Su Ha ,  Jin-Won Kang ,  Jung-Hyeon Kim ,  Se-Jun Yu

IPC: H01R11/30

CPC classification number: G01R1/0466 ,  G01R1/0483 ,  H01R11/30 ,  H01R12/7076 ,  H01R13/2407

Abstract: Example embodiments of the present invention include a socket for testing a semiconductor package. The socket comprises a body having a through hole. A lower magnet is disposed in a lower region of the through hole, and a first type magnetic pole of the lower magnet is directed upward. An upper magnet is disposed in an upper region of the through hole, wherein the first type magnetic pole of the upper magnet is directed toward the lower magnet. The upper and lower magnets are structured to absorb a shock wave which is generated when the semiconductor package is arranged for testing. A conductive medium is disposed between the lower magnet and the upper magnet to electrically couple contactors of the semiconductor package to a base substrate of the socket.

Abstract translation: 本发明的示例性实施例包括用于测试半导体封装的插座。 插座包括具有通孔的主体。 下磁铁配置在通孔的下部区域，下磁铁的第一型磁极向上方。 上磁体设置在通孔的上部区域中，其中上磁体的第一型磁极指向下磁体。 上磁铁和下磁体被构造成吸收当半导体封装被布置用于测试时产生的冲击波。 导电介质设置在下磁体和上磁体之间，以将半导体封装的接触器电耦合到插座的基底。