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公开(公告)号:US07736989B2
公开(公告)日:2010-06-15
申请号:US12176618
申请日:2008-07-21
申请人: Dong-Won Chang , Sung-Nam Chang , Seung-Gun Seo , Dong-Seog Eun
发明人: Dong-Won Chang , Sung-Nam Chang , Seung-Gun Seo , Dong-Seog Eun
IPC分类号: H01L21/762 , H01L21/28
CPC分类号: H01L21/76224 , H01L27/11521 , H01L27/11524
摘要: A method of forming a semiconductor device, where the method may include forming a first trench in a semiconductor substrate, forming first device isolation patterns that fill the first trench, forming spacers on sidewalls of the first device isolation patterns, forming a second trench in the semiconductor substrate between first device isolation patterns, and forming second device isolation patterns that fill the second trench. The second trench is formed using an etching process adopting the first device isolation pattern and the spacer as a mask.
摘要翻译: 一种形成半导体器件的方法,其中所述方法可以包括在半导体衬底中形成第一沟槽,形成填充第一沟槽的第一器件隔离图案,在第一器件隔离图案的侧壁上形成间隔物,在第二沟槽中形成第二沟槽 半导体衬底在第一器件隔离图案之间,以及形成填充第二沟槽的第二器件隔离图案。 使用采用第一器件隔离图案和间隔物作为掩模的蚀刻工艺形成第二沟槽。
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公开(公告)号:US20090029520A1
公开(公告)日:2009-01-29
申请号:US12176618
申请日:2008-07-21
申请人: Dong-Won CHANG , Sung-Nam Chang , Seung-Gun Seo , Dong-Seog Eun
发明人: Dong-Won CHANG , Sung-Nam Chang , Seung-Gun Seo , Dong-Seog Eun
IPC分类号: H01L21/762 , H01L21/28
CPC分类号: H01L21/76224 , H01L27/11521 , H01L27/11524
摘要: A method of forming a semiconductor device, where the method may include forming a first trench in a semiconductor substrate, forming first device isolation patterns that fill the first trench, forming spacers on sidewalls of the first device isolation patterns, forming a second trench in the semiconductor substrate between first device isolation patterns, and forming second device isolation patterns that fill the second trench. The second trench is formed using an etching process adopting the first device isolation pattern and the spacer as a mask.
摘要翻译: 一种形成半导体器件的方法,其中所述方法可以包括在半导体衬底中形成第一沟槽,形成填充第一沟槽的第一器件隔离图案,在第一器件隔离图案的侧壁上形成间隔物,在第二沟槽中形成第二沟槽 半导体衬底在第一器件隔离图案之间,以及形成填充第二沟槽的第二器件隔离图案。 使用采用第一器件隔离图案和间隔物作为掩模的蚀刻工艺形成第二沟槽。
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