High speed sense amplifier for memory output
    1.
    发明授权
    High speed sense amplifier for memory output 有权
    用于存储器输出的高速读出放大器

    公开(公告)号:US06940315B2

    公开(公告)日:2005-09-06

    申请号:US10390136

    申请日:2003-03-14

    IPC分类号: G11C7/06 G11C7/12 G01R19/00

    摘要: A sense amplifier circuit includes a latch circuit to enhance the speed of a sensing operation and to obviate the need for a latch circuit to capture the output value of the sense amplifier circuit. In one embodiment, first and second differential amplifiers provide a differential signal to the latch circuit. The high gain in the latch circuit resolves the differential signal to a logic signal, which is then provided to an output amplifier. In one embodiment, the differential signal is provided to the latch circuit after the differential signal across the input terminals of the first and second differential amplifiers exceeds a predetermined value.

    摘要翻译: 读出放大器电路包括用于提高感测操作速度的锁存电路,并且避免需要锁存电路来捕捉读出放大器电路的输出值。 在一个实施例中,第一和第二差分放大器向锁存电路提供差分信号。 锁存电路中的高增益将差分信号解析为逻辑信号,然后提供给输出放大器。 在一个实施例中,在跨越第一和第二差分放大器的输入端子的差分信号超过预定值之后,差分信号被提供给锁存电路。

    Redundant memory content substitution apparatus and method
    2.
    发明授权
    Redundant memory content substitution apparatus and method 有权
    冗余内存替代设备和方法

    公开(公告)号:US07193895B2

    公开(公告)日:2007-03-20

    申请号:US11165977

    申请日:2005-06-24

    IPC分类号: G11C11/34

    CPC分类号: G11C29/846

    摘要: A memory apparatus includes a main memory, a redundant memory, and a substitution control unit. The main memory is configured to receive a read address and output a main data word comprising a plurality of main data sub-words where the read address includes a first portion and a second portion. The redundant memory is configured to receive the read address first portion and output a redundant data sub-word. The substitution control unit includes a substitution control word memory configured to store a plurality of substitution control words and configured to receive the read address first portion and assert a substitution control word including a substitution address second portion. The read address first portion and substitution address second portion form a substitution address. The substitution control unit asserts a substitution control signal when there is a match between the read address and the substitution address.

    摘要翻译: 存储装置包括主存储器,冗余存储器和替代控制单元。 主存储器被配置为接收读取地址并输出包括多个主数据子字的主数据字,其中读地址包括第一部分和第二部分。 冗余存储器被配置为接收读取地址第一部分并输出冗余数据子字。 替代控制单元包括:替代控制字存储器,被配置为存储多个替代控制字,并且被配置为接收读取地址第一部分,并且声明包括替换地址第二部分的替代控制字。 读取地址第一部分和替换地址第二部分形成替换地址。 当读取地址和替代地址之间存在匹配时,替代控制单元断言替换控制信号。

    Method of sensing data in semiconductor memory device
    3.
    发明授权
    Method of sensing data in semiconductor memory device 有权
    在半导体存储器件中检测数据的方法

    公开(公告)号:US6091653A

    公开(公告)日:2000-07-18

    申请号:US375448

    申请日:1999-08-17

    IPC分类号: G11C7/22 G11C7/00

    CPC分类号: G11C7/22 G11C2207/2281

    摘要: The present invention provides a method of sensing data in a semiconductor device. First, an equalizing instructing signal is provided to stop precharging and equalizing the bit line pair while in a reading state. Then a wordline is selected to transmit the data in a memory cell to one of the pair of bit lines for obtaining a potential difference between the bit line pair. A sensing enable signal is subsequently provided to activate the shared sense amplifier for sensing and amplifying the data. And a potential level of the selecting control signal is boosted to a boosted potential level to restore and read the data by delaying a predetermined period of time.

    摘要翻译: 本发明提供了一种在半导体器件中检测数据的方法。 首先,提供均衡指示信号,以在读取状态下停止对位线对的预充电和均衡。 然后选择字线将存储器单元中的数据发送到该对位线之一,以获得位线对之间的电位差。 随后提供感测使能信号以激活用于感测和放大数据的共享读出放大器。 并且选择控制信号的电位电平被提升到提升电位电平,以通过延迟预定时间段来恢复和读取数据。