公开(公告)号：US06864580B2

公开(公告)日：2005-03-08

申请号：US09915567

申请日：2001-07-27

申请人： Shoichiro Nakazawa ,  Heiji Kobayashi

发明人： Shoichiro Nakazawa ,  Heiji Kobayashi

IPC分类号： H01L21/28 ,  H01L21/768 ,  H01L21/8242 ,  H01L27/108 ,  H01L23/48 ,  H01L21/4763 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76897 ,  H01L21/76831

摘要： A semiconductor device having a structure in which no short circuit occurs between plug interconnections even when a void occurs in an insulating layer in a gap between wiring layers and a method of manufacturing the same are attained. The method includes: a step of forming transfer gates so as to be close to each other with a gap on a semiconductor substrate; a step of burying the gap and covering a wiring layer; a step of opening a contact hole in an insulating layer in the gap portion; a step of depositing a short-circuit preventing insulating film in the contact hole; an etch back step of removing the short-circuit preventing insulating film at least on the bottom of the gap to expose the semiconductor substrate; and a step of forming a plug interconnection.

摘要翻译： 即使在布线层之间的间隙中的绝缘层中发生空隙的情况下也可以获得其插塞互连之间不发生短路的结构及其制造方法。 该方法包括：在半导体衬底上以间隙形成彼此靠近的传输栅极的步骤; 埋置间隙并覆盖布线层的步骤; 在间隙部分中的绝缘层中打开接触孔的步骤; 在接触孔中沉积短路防止绝缘膜的步骤; 至少在所述间隙的底部去除所述短路防止绝缘膜以露出所述半导体衬底的回蚀步骤; 以及形成插头互连的步骤。