Method for controlling a pre-charge process and a respective integrated circuit
    1.
    发明授权
    Method for controlling a pre-charge process and a respective integrated circuit 有权
    用于控制预充电过程的方法和相应的集成电路

    公开(公告)号:US08102725B2

    公开(公告)日:2012-01-24

    申请号:US12677287

    申请日:2008-08-20

    申请人: Soenke Ostertun

    发明人: Soenke Ostertun

    IPC分类号: G11C7/00

    摘要: A method of controlling a pre-charge process of a data line (21, 22) in an integrated circuit (100) comprises the step of monitoring a rate of change of a voltage applied to the data line (21, 22) for enhancing the security. Further a respective integrated circuit (100) is disclosed.

    摘要翻译: 控制集成电路(100)中的数据线(21,22)的预充电处理的方法包括监视施加到数据线(21,22)的电压的变化率以增强 安全。 此外,公开了各自的集成电路(100)。

    SENSOR WITH A CIRCUIT ARRANGEMENT
    2.
    发明申请
    SENSOR WITH A CIRCUIT ARRANGEMENT 审中-公开
    具有电路布置的传感器

    公开(公告)号:US20100299756A1

    公开(公告)日:2010-11-25

    申请号:US12299950

    申请日:2007-05-03

    IPC分类号: G06F21/00

    CPC分类号: G06K19/07363 G06K19/07345

    摘要: The invention relates to a sensor, in particular for detecting attacks on at least one signal-carrying line (11), in particular of chip cards (1), said sensor having a circuit arrangement (10) which comprises a first circuit arrangement (13) for detecting an instantaneous voltage value above a first supply voltage and a second circuit arrangement (14) for detecting an instantaneous voltage value below a second supply voltage, wherein, when a voltage value outside the range between the first and second supply voltages is detected, a signal (19) is generated and can be taken as a basis for initiating a protective measure.

    摘要翻译: 本发明涉及一种传感器,特别是用于检测至少一条信号传输线路(11),特别是芯片卡(1)的攻击,所述传感器具有电路装置(10),该电路装置包括第一电路装置 ),用于检测高于第一电源电压的瞬时电压值;以及第二电路装置(14),用于检测低于第二电源电压的瞬时电压值,其中当检测到在第一和第二电源电压之间的范围之外的电压值时 ,产生信号(19),并且可以作为启动保护措施的基础。

    Semiconductor Device and Method For Preventing Attacks on the Semiconductor Device
    3.
    发明申请
    Semiconductor Device and Method For Preventing Attacks on the Semiconductor Device 审中-公开
    用于防止对半导体器件的攻击的半导体器件和方法

    公开(公告)号:US20090049548A1

    公开(公告)日:2009-02-19

    申请号:US12090732

    申请日:2006-10-16

    IPC分类号: G06F21/02 G06F12/16 G06F12/00

    摘要: The invention relates to a method and to a semiconductor device, comprising means for detecting an unauthorized access to the semiconductor device, wherein the semiconductor device carries out an initialization of the semiconductor device following detection of an unauthorized access, wherein an information item relating to the unauthorized access can be stored by the semiconductor device prior to the initialization, and wherein the stored information item relating to the unauthorized access remains intact following the initialization of the semiconductor device. It is advantageously provided that the stored information item remains intact for a predetermined period of time following disconnection of the semiconductor device from a power supply.

    摘要翻译: 本发明涉及一种方法和半导体器件,包括用于检测对半导体器件的未经授权的访问的装置,其中半导体器件在检测到未经授权的访问之后执行半导体器件的初始化,其中与 在初始化之前,半导体器件可以存储未经授权的访问,并且其中与半导体器件的初始化之后的与未授权访问有关的所存储的信息项保持不变。 有利的是,在将半导体器件从电源断开之后的预定时间段内,存储的信息项保持完整。

    Electronic memory component or memory module, and method of operating same
    4.
    发明申请
    Electronic memory component or memory module, and method of operating same 审中-公开
    电子存储器部件或存储器模块及其操作方法

    公开(公告)号:US20060076418A1

    公开(公告)日:2006-04-13

    申请号:US10535349

    申请日:2002-11-10

    IPC分类号: G06K19/06

    CPC分类号: G11C29/10 G11C5/04 G11C29/52

    摘要: In order to develop an electronic memory component or memory module (100), having at least one memory cell area (10) in which physical states (P) representing regular data are mapped by means of at least one mapping function (A) that describes at least one error correction code, for example at least one Hamming code, and also a method of operating at least one electronic memory component or memory module (100) of the abovementioned type, such that on the one hand the error detection probability is considerably increased and on the other hand unwritten memory blocks can be reliably distinguished from memory blocks that have already been written to once before, it is proposed that at least one further physical state in the form of at least one exceptional or special state (L, S) in the error correction code can be detected, encoded and/or indicated by means of the mapping function (A).

    摘要翻译: 为了开发具有至少一个存储单元区域(10)的电子存储器组件或存储器模块(100),其中通过至少一个映射功能(A)映射表示常规数据的物理状态(P) 至少一个纠错码,例如至少一个汉明码,以及操作上述类型的至少一个电子存储器组件或存储器模块(100)的方法,使得一方面,错误检测概率相当大 而另一方面,未写入的存储器块可以可靠地与已经被写入一次的存储器块区分开,所以提出至少一种形式为至少一个异常或特殊状态的物理状态(L,S )可以通过映射函数(A)进行检测,编码和/或指示。

    METHOD FOR CONTROLLING A PRE-CHARGE PROCESS AND A RESPECTIVE INTEGRATED CIRCUIT
    5.
    发明申请
    METHOD FOR CONTROLLING A PRE-CHARGE PROCESS AND A RESPECTIVE INTEGRATED CIRCUIT 有权
    用于控制预充电过程和相关集成电路的方法

    公开(公告)号:US20100207647A1

    公开(公告)日:2010-08-19

    申请号:US12677287

    申请日:2008-08-20

    申请人: Soenke Ostertun

    发明人: Soenke Ostertun

    IPC分类号: G01R27/08

    摘要: A method of controlling a pre-charge process of a data line (21, 22) in an integrated circuit (100) comprises the step of monitoring a rate of change of a voltage applied to the data line (21, 22) for enhancing the security. Further a respective integrated circuit (100) is disclosed.

    摘要翻译: 控制集成电路(100)中的数据线(21,22)的预充电处理的方法包括监视施加到数据线(21,22)的电压的变化率以增强 安全。 此外,公开了各自的集成电路(100)。

    Error Detection/Correction Circuit as Well as Corresponding Method
    6.
    发明申请
    Error Detection/Correction Circuit as Well as Corresponding Method 审中-公开
    错误检测/纠正电路以及相应的方法

    公开(公告)号:US20080256415A1

    公开(公告)日:2008-10-16

    申请号:US12067977

    申请日:2006-09-19

    IPC分类号: H03M13/05 G06F11/08

    CPC分类号: G06F11/1008

    摘要: In order to provide an error detection/correction circuit (100; 100′) as well as a method for detecting and/or for correcting at least one error of at least one data word, said data word comprising—information in the form of at least one information bit or at least one pay load data bit, and—redundancy in the form of at least one check bit or at least one redundant bit, wherein the number of the one or more check bits or redundant bits being supplemented to the respective data word is optimized, in particular wherein at least one physical memory space can be used in an optimized way depending on the requirements of the application, it is proposed—to perform at least one first error correction scheme being assigned to at least one first data path (30; 30′), and—to perform at least one second error correction scheme—being assigned to at least one second data path (40; 40), and—being designed for increasing the information and/or the redundancy, in particular—for increasing the number of the one or more information bits or of the one or more pay load data bits and/or—for increasing the number of the one or more check bits or of the one or more redundant bits, of the respective data word being transmitted through the second data path (40; 40).

    摘要翻译: 为了提供错误检测/校正电路(100; 100')以及用于检测和/或校正至少一个数据字的至少一个错误的方法,所述数据字包括以下形式的信息:以 至少一个信息位或至少一个有效负载数据位,以及至少一个校验位或至少一个冗余位形式的冗余,其中所述一个或多个校验位或冗余位的数量被补充到相应的 数据字被优化,特别是其中至少一个物理存储器空间可以根据应用的要求以优化的方式使用,因此建议执行至少一个第一纠错方案被分配给至少一个第一数据 路径(30; 30'),以及 - 执行被分配给至少一个第二数据路径(40; 40)的至少一个第二错误校正方案,并被设计用于增加信息和/或冗余 特别是增加麻木 所述一个或多个信息比特或所述一个或多个付费负载数据比特和/或用于增加正在发送的相应数据字的一个或多个校验比特或所述一个或多个冗余比特的数目 第二数据路径(40; 40)。