公开(公告)号：US4794523A

公开(公告)日：1988-12-27

申请号：US782664

申请日：1985-09-30

申请人： Manolito Adan ,  Steven Meadows ,  Robert McCaslin

发明人： Manolito Adan ,  Steven Meadows ,  Robert McCaslin

IPC分类号： G06F12/08 ,  G06F9/28

CPC分类号： G06F12/0802

摘要： A method and apparatus for enhancing the speed of operation of a computer consists of providing a cache memory which is faster than the computer's main memory, disabling the computer's main microprocessor, and replacing it with a microprocessor with a faster clock cycle time. A portion of the program stored in the main memory is stored in the cache memory. The addresses of the portion of the main memory stored in the cache memory are noted in a tag RAM. Upon each addressing sequence during the execution of a program, the tag RAM is examined to determine if the addressed located is stored in the cache memory. If the stored location is identified in the tag RAM, it is retrieved from the cache memory at high-speed. Otherwise, the data in the address location is retrieved from main memory at a slower speed and written into the cache memory so that subsequent accesses may be made at high-speed.

摘要翻译： 一种用于提高计算机的操作速度的方法和装置包括提供比计算机的主存储器更快的高速缓冲存储器，禁用计算机的主微处理器，并用更快的时钟周期时间的微处理器来代替它。 存储在主存储器中的程序的一部分被存储在高速缓冲存储器中。 存储在高速缓冲存储器中的主存储器的部分的地址在标签RAM中记录。 在执行程序期间的每个寻址序列时，检查标签RAM以确定寻址位置是否存储在高速缓冲存储器中。 如果在标签RAM中识别存储的位置，则从高速缓冲存储器中高速检索。 否则，以较慢的速度从主存储器中检索地址位置中的数据，并写入高速缓冲存储器，以便可以高速进行后续访问。