Error detection circuitry for digital systems
    2.
    发明授权
    Error detection circuitry for digital systems 失效
    数字系统的错误检测电路

    公开(公告)号:US4507783A

    公开(公告)日:1985-03-26

    申请号:US470148

    申请日:1983-02-28

    IPC分类号: H04L1/00 H04L7/04 G06F11/10

    CPC分类号: H04L1/0057 H04L7/048

    摘要: Circuitry for detecting errors in a digital bit stream comprising a succession of data blocks and wherein each data block incorporates a parity check. At an error monitoring location, a bistable device toggles in response to either a logical "1" or "0" in the bit stream. The output of the bistable device is sampled at a submultiple of the bit rate and compared with a predetermined criterion to detect bit errors.

    摘要翻译: 用于检测包括一系列数据块的数字比特流中的错误的电路,并且其中每个数据块都包含奇偶校验。 在错误监视位置,双稳态器件响应于位流中的逻辑“1”或“0”来切换。 双稳态器件的输出以比特率的多项式进行采样,并与预定标准进行比较,以检测位错误。