摘要:
A programmable synchronizing unit for a signal receiver has a received data memory for buffering received data, a correlation value data memory for storing correlation values, a data path for correlating the received data with the correlation values, a result data memory for buffering the received data correlated with the correlation values by means of the data path, and a control unit for addressing the received data memory, the result data memory and the correlation value data memory (26) and for controlling the data path as a function of a synchronization program which is stored in a program memory.
摘要:
Contactless determination of electrical parameters. The examples describe a method and apparatus for determining electrical parameters of assemblies (printed circuit boards and as well as passive components) by the contactless determination of the spatial distribution of material. The spatial distribution of material (two-dimensional or three dimensional), is determined for example by measurement by radiographic technology with an X-ray machine or a computer tomography or by an optical instrument. The electrical parameter is determined in each volume element whose size is determined by the resolution of the method used for determining the material distribution, or a partial structure of the conductive structure.
摘要:
A device for carrying out search procedures includes a memory for storing a digital received data sequence, and a memory storing a predetermined correlation data sequence. A correlation device has a first section, in which sequence elements of the received data sequence are correlated with sequence elements of the correlation data sequence. A variable number K of sequence element correlation results are summed in the second section, in order to form an accumulated correlation result.
摘要:
The novel synchronous feedback digital circuit has a minimized switching power loss. A data input receives an input data stream. A multiplicity of logic circuits and clocked registers are connected in a feedback loop between the data input and a data output. A clock generator generates an operating clock signal and a signal generating device generates phase-shifted clock signals for the clocked registers. The phase-shifted clock signals are phase shifted for the specific registers by ϕ N - i - 1 = N - [ i mod N ] - 1 N · T , where T is an operating clock period of the operating clock signal, N is a factor, i is a number of registers between the register clocked by the phase-shifted clock signal and the data input of the digital circuit.