公开(公告)号：US08415762B2

公开(公告)日：2013-04-09

申请号：US11933195

申请日：2007-10-31

申请人： Yoshinori Yoshida ,  Tatsuya Tominari ,  Toshio Ando

发明人： Yoshinori Yoshida ,  Tatsuya Tominari ,  Toshio Ando

IPC分类号： H01L21/331 ,  H01L29/737

CPC分类号： H01L29/7378 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/66242

摘要： The external base electrode has a two-layered structure where a p-type polysilicon film doped with a medium concentration of boron is laminated on a p-type polysilicon film doped with a high concentration of boron. Therefore, since the p-type polysilicon film doped with a high concentration of boron is in contact with an intrinsic base layer at a junction portion between the external base electrode and the intrinsic base layer, the resistance of the junction portion can be reduced. In addition, since the resistance of the external base electrode becomes a parallel resistance of the two layers of the p-type polysilicon films, the resistance of the p-type polysilicon film whose boron concentration is relatively lower is dominant.

摘要翻译： 外部基极具有两层结构，其中掺杂有中等浓度硼的p型多晶硅膜层压在掺杂有高浓度硼的p型多晶硅膜上。 因此，由于掺杂高浓度的硼的p型多晶硅膜在外部基极和本征基极层之间的接合部与本征基极层接触，所以能够降低接合部的电阻。 此外，由于外部基极的电阻成为p型多晶硅膜的两层的并联电阻，所以其硼浓度相对较低的p型多晶硅膜的电阻是主要的。

公开(公告)号：US06933201B2

公开(公告)日：2005-08-23

申请号：US10347221

申请日：2003-01-21

申请人： Tatsuya Tominari ,  Takashi Hashimoto ,  Tomoko Jinbo ,  Tsutomu Udo

发明人： Tatsuya Tominari ,  Takashi Hashimoto ,  Tomoko Jinbo ,  Tsutomu Udo

IPC分类号： H01L21/331 ,  H01L21/8222 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/732 ,  H01L29/737

CPC分类号： H01L29/66242 ,  H01L21/8249

摘要： Provided is a manufacturing method of a semiconductor device, which comprises exposing a surface of a semiconductor substrate on which a heterocrystalline layer is to be grown inside of a second emitter opening portion of a hetero-junction bipolar transistor, removing water by preheat treatment in a reducing gas atmosphere, subjecting the substrate to second heat treatment in a reducing gas atmosphere at a temperature which is higher than the preheating treatment but does not adversely affect the impurity concentration distribution of another element on the semiconductor substrate, thereby removing an oxide film formed on the surface on which the heterocrystalline layer is to be grown, and then selectively causing epitaxial growth of the heterocrystalline layer on the thus cleaned surface in the second emitter opening portion. According to the present invention, reliability of a semiconductor device having a hetero-junction bipolar transistor can be improved.

摘要翻译： 提供一种半导体器件的制造方法，其包括使异质结双极晶体管的第二发射极开口部分内部生长异质晶体层的半导体衬底的表面曝光，通过预热处理将水除去 降低气体气氛，在还原气体气氛中在比预热处理温度高的条件下对基板进行第二次热处理，但对半导体基板上的另一元件的杂质浓度分布没有不利影响，从而除去形成在 将要生长杂晶层的表面，然后选择性地引起异质晶体层在第二发射极开口部分上如此清洁的表面上的外延生长。 根据本发明，可以提高具有异质结双极晶体管的半导体器件的可靠性。

公开(公告)号：US20080099788A1

公开(公告)日：2008-05-01

申请号：US11933195

申请日：2007-10-31

申请人： Yoshinori Yoshida ,  Tatsuya Tominari ,  Toshio Ando

发明人： Yoshinori Yoshida ,  Tatsuya Tominari ,  Toshio Ando

IPC分类号： H01L29/737 ,  H01L21/331

CPC分类号： H01L29/7378 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/66242

摘要： The external base electrode has a two-layered structure where a p-type polysilicon film doped with a medium concentration of boron is laminated on a p-type polysilicon film doped with a high concentration of boron. Therefore, since the p-type polysilicon film doped with a high concentration of boron is in contact with an intrinsic base layer at a junction portion between the external base electrode and the intrinsic base layer, the resistance of the junction portion can be reduced. In addition, since the resistance of the external base electrode becomes a parallel resistance of the two layers of the p-type polysilicon films, the resistance of the p-type polysilicon film whose boron concentration is relatively lower is dominant.

摘要翻译： 外部基极具有两层结构，其中掺杂有中等浓度硼的p型多晶硅膜层压在掺杂有高浓度硼的p型多晶硅膜上。 因此，由于掺杂高浓度的硼的p型多晶硅膜在外部基极和本征基极层之间的接合部与本征基极层接触，所以能够降低接合部的电阻。 此外，由于外部基极的电阻成为p型多晶硅膜的两层的并联电阻，所以其硼浓度相对较低的p型多晶硅膜的电阻是主要的。